imx6ul add a 32M norflash (mx25L25645G), reboot err

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imx6ul add a 32M norflash (mx25L25645G), reboot err

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simonL7
Contributor II

1227 static void fsl_qspi_shutdown(struct platform_device *pdev)
1228 {
1229 struct fsl_qspi *q = platform_get_drvdata(pdev);
1230 int i;
1231 struct spi_nor *nor = NULL;
1232
1233 nor = &q->nor[0];
1234 //add exit 4byte addr mode
1235 nor->write_reg(nor, SPINOR_OP_WREN, NULL, 0, 0);
1236 nor->write_reg(nor, SPINOR_OP_EX4B, NULL, 0, 0);
1237
1238 for (i = 0; i < FSL_QSPI_MAX_CHIP; i++)
1239 mtd_device_unregister(&q->mtd[i]);
1240
1241 /* disable the hardware */
1242 writel(QUADSPI_MCR_MDIS_MASK, q->iobase + QUADSPI_MCR);
1243 writel(0x0, q->iobase + QUADSPI_RSER);
1244
1245 if (q->ahb_addr)
1246 iounmap(q->ahb_addr);
1247
1248 return;
1249 }

I add exit 4byte mode shutdown function in fsl-quadspi.c, the err is show:

[ 2504.082501] fsl-quadspi 21e0000.qspi: cmd 0x06 timeout, addr@00000000, FR:0x08000000, SR:0x02007c00
[ 2504.091635] fsl-quadspi 21e0000.qspi: Unsupported cmd 0xe9
[ 2505.092496] fsl-quadspi 21e0000.qspi: cmd 0xe9 timeout, addr@00000000, FR:0x08000000, SR:0x02007c00

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simonL7
Contributor II

1262 static void fsl_qspi_shutdown(struct platform_device *pdev)
1263 {
1264 struct fsl_qspi *q = platform_get_drvdata(pdev);
1265 int i, ret;
1266 struct spi_nor *nor = &q->nor[0];
1267
1268 if(nor->addr_width == 4)
1269 {
1270 ret = fsl_qspi_clk_prep_enable(q);
1271 if (ret)
1272 {
1273 return;
1274 }
1275
1276 /* Wait until finished previous write command. */
1277 ret = nor->wait_till_ready(nor);
1278 if (ret)
1279 {
1280 return;
1281 }
1282
1283 //add exit 4byte addr mode
1284 nor->write_reg(nor, SPINOR_OP_WREN, NULL, 0, 0);
1285 nor->write_reg(nor, SPINOR_OP_EX4B, NULL, 0, 0);
1286
1287 for (i = 0; i < FSL_QSPI_MAX_CHIP; i++)
1288 mtd_device_unregister(&q->mtd[i]);
1289
1290 /* disable the hardware */
1291 writel(QUADSPI_MCR_MDIS_MASK, q->iobase + QUADSPI_MCR);
1292 writel(0x0, q->iobase + QUADSPI_RSER);
1293
1294 if (q->ahb_addr)
1295 iounmap(q->ahb_addr);
1296
1297 nor->addr_width = 3;
1298 fsl_qspi_clk_disable_unprep(q);
1299 }
1300
1301 return;
1302 }

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simonL7
Contributor II

1262 static void fsl_qspi_shutdown(struct platform_device *pdev)
1263 {
1264 struct fsl_qspi *q = platform_get_drvdata(pdev);
1265 int i, ret;
1266 struct spi_nor *nor = &q->nor[0];
1267
1268 if(nor->addr_width == 4)
1269 {
1270 ret = fsl_qspi_clk_prep_enable(q);
1271 if (ret)
1272 {
1273 return;
1274 }
1275
1276 /* Wait until finished previous write command. */
1277 ret = nor->wait_till_ready(nor);
1278 if (ret)
1279 {
1280 return;
1281 }
1282
1283 //add exit 4byte addr mode
1284 nor->write_reg(nor, SPINOR_OP_WREN, NULL, 0, 0);
1285 nor->write_reg(nor, SPINOR_OP_EX4B, NULL, 0, 0);
1286
1287 for (i = 0; i < FSL_QSPI_MAX_CHIP; i++)
1288 mtd_device_unregister(&q->mtd[i]);
1289
1290 /* disable the hardware */
1291 writel(QUADSPI_MCR_MDIS_MASK, q->iobase + QUADSPI_MCR);
1292 writel(0x0, q->iobase + QUADSPI_RSER);
1293
1294 if (q->ahb_addr)
1295 iounmap(q->ahb_addr);
1296
1297 nor->addr_width = 3;
1298 fsl_qspi_clk_disable_unprep(q);
1299 }
1300
1301 return;
1302 }

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jimmychan
NXP TechSupport
NXP TechSupport

which version of BSP are you using?

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simonL7
Contributor II

linux  3.14.52

 

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