imx6 spi slave mode without SS signal

[kurkinalexandr]

Hello.

I am interested, if it is possible to use imx6 spi in slave mode with disconnected SS signal. I plane clear SSB_CTRL bit so that the data could be advanced "when the number of bits received in the shift register is
equal to (BURST LENGTH + 1)"

Do you know is it workable configuration, or SS signal is necessarily needs for slave mode.

Regards.

[andrewwozniak]

Hello Artur,

Would you know if your SPI slave mode solution works for i.MX6 SoloX?

There are published errata which says:

ERR009535 - eCSPI: Burst completion by SS signal in slave mode is not functional - No fix scheduled

If this still applies, is there a potential workaround?

Thanks,
Andrew

[art]

The SS signal is still required in that case, since only the negation of the SS signal shifts the received burst (whose length is defined by the BURST LENGTH + 1 parameter) from the receiving shift register to the RxFIFO, thus, making the received data accessible for software.

Best Regards,
Artur

[andrewwozniak]

Perhaps I misunderstand the relationship between the ERRATA and your suggestion for burst mode. The errata says that "Burst completion by SS signal in slave mode is not functional". If this is true, is it possible to operation burst slave mode "without" SS signal?

Thanks,

Andrew

[art · Accepted solution]

The SS signal is necessarily required even when operating in slave mode, since only the negation of the external SS signal latches the received burst (as defined by the BURST LENGTH + 1 parameter) from the shift register to the RxFIFO.

Have a great day,
Artur

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