iMX8MP dual camera with ISP - update mi_mp_y_pic_width error

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iMX8MP dual camera with ISP - update mi_mp_y_pic_width error

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GreatForest
Contributor I

Hello all:

I'm porting two ov4689 cameras to the i.MX 8MP board. (isp-imx-4.2.2.11.0 and isp-vvcam_imx_5.4.70_2.3.2)

Now channel 1 can get the image data, but channel 2 failed to get the data.

Here is the command to get the image, and the log of isp_media_server.

gst-launch-1.0 v4l2src device=/dev/video1 num-buffers=1 ! video/x-raw,width=1280,height=720,framerate=60/1,format=YUY2 ! jpegenc ! filesink location=frame.jpg

GreatForest_0-1667790180614.png

In the red box is an error message. The normal execution message for channel 1 is wdr3 res: 1280 720, but I don't know why channel 2 is 0 0.

Can somebody, please help me on how I can make this work? Thanks in advance !

 

Regards,

Forest.

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joanxie
NXP TechSupport
NXP TechSupport
which dtb do you use?
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GreatForest
Contributor I

The attachment is the device tree file I used.

The following is the content of myd-jx8mp-dual-ov4689.dts.

#include "myd-jx8mp-base.dts"

&i2c2 {
	/delete-node/ov5640_mipi@3c;

	ov4689_0: ov4689_mipi@36 {
		compatible = "ovti,ov4689";
		reg = <0x36>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_csi0_pwn>, <&pinctrl_csi0_rst>,<&pinctrl_io0_pwn>;
		clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
		clock-names = "csi_mclk";
		assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
		assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
		assigned-clock-rates = <24000000>;
		csi_id = <0>;
		pwn-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>;
		rst-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
		mclk = <24000000>;
		mclk_source = <0>;
		mipi_csi;
		status = "okay";

		port {
			ov4689_mipi_0_ep: endpoint {
				remote-endpoint = <&mipi_csi0_ep>;
				data-lanes = <1 2 3 4>;
				clock-lanes = <0>;
			};
		};
	};
};

&i2c3 {
	/delete-node/ov5640_mipi@3c;

	ov4689_1: ov4689_mipi@36 {
		compatible = "ovti,ov4689";
		reg = <0x36>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_csi1_pwn>, <&pinctrl_csi1_rst>,<&pinctrl_io1_pwn>;
		clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
		clock-names = "csi_mclk";
		assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
		assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
		assigned-clock-rates = <24000000>;
		csi_id = <1>;
		pwn-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
		rst-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
		mclk = <24000000>;
		mclk_source = <0>;
		mipi_csi;
		status = "okay";

		port {
			ov4689_mipi_1_ep: endpoint {
				remote-endpoint = <&mipi_csi1_ep>;
				data-lanes = <1 2 3 4>;
				clock-lanes = <0>;
			};
		};
	};
};

&cameradev {
	status = "okay";
};

&isi_0 {
	status = "disabled";
};

&isi_1 {
	status = "disabled";
};

&isp_0 {
	status = "okay";
};

&isp_1 {
	status = "okay";
};

&dewarp {
	status = "okay";
};

&mipi_csi_0 {
	status = "okay";

	port@0 {
		reg = <0>;
		mipi_csi0_ep: endpoint {
			remote-endpoint = <&ov4689_mipi_0_ep>;
			data-lanes = <4>;
			csis-hs-settle = <13>;
			csis-clk-settle = <2>;
			csis-wclk;
		};
	};
};

&mipi_csi_1 {
	status = "okay";

	port@1 {
		reg = <1>;
		mipi_csi1_ep: endpoint {
			remote-endpoint = <&ov4689_mipi_1_ep>;
			data-lanes = <4>;
			csis-hs-settle = <13>;
			csis-clk-settle = <2>;
			csis-wclk;
		};
	};
};

 

At present, I find the problem is that the isp driver failed to write a value to the register.

GreatForest_0-1668502032027.png

 

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joanxie
NXP TechSupport
NXP TechSupport

if you disable isp0, does it isp1 work? you can check the logfile if your board detect and link the ov4689 by isp1 or not

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