Hi,
we have a custom design based on i.MX8 with a DDR4 memory.
we customized the design so that the i.MX8M DDR4 data lines are swapped and not routed directly to the DDR4 in the same order of pins, for ex:
In a previous design where we used LPDDR4 memory, we had a special tab in the excel tool MX8M_Mini_LPDDR4_RPA_v15 to make the bit swapping:
However we don't have such a tab in the DDR4 tool MX8M_Mini_DDR4_RPA_v11
Thanks very much.
Thank you for the reply.
Good to know that there are no limitations on swapping the DDR4 data lines, however how do we tell the DDR4 tool MX8M_Mini_DDR4_RPA_v11 to do the DQ lanes swapping in order to start a DDR4 stress test for our custom design?
attached is the MX8M_Mini_DDR4_RPA_v11 file we use.
thank you!
Hi saidjazouly ,
For iMX8MM-EVK, we have 2 versions, one is i.mx8mm + lpddr4, the other is imx8mm+DDR4. attachment is 8MMINID4-EVK-DESIGNFILES. you can refer to it to design your product.
For DDR4, there is no restriction on the exchange of data bits, as you can see in this design files.
Have a nice day!
B.R,
weidong