iMX8M Mini not booting up as VDD_DRAM is not getting required power by PCA9450AAHNY PMIC.

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

iMX8M Mini not booting up as VDD_DRAM is not getting required power by PCA9450AAHNY PMIC.

1,947 次查看
Zeel
Contributor II

Hello,

We are using iMX8M Mini in our project which is powered up by PMIC PCA9450AAHNY and we are facing issue with boot up.

The difference we observed between the boards which are booting up properly and the ones which are not is that, the former boards are getting expected voltage at VDD_DRAM rail, as per values set in register, of 0.95V from PMIC (BUCK3) whereas the ones which are not booting up is sourced by 0.85V from PMIC (BUCK3) which is default value generated by PMIC (BUCK3). 

We're using LPDDR4 at 1.5GHz (DDR clock) frequency which requires typically 0.95V hence we doubt that since it is not getting required power it is hindering booting process. We suspect that patch from SDK for PMIC provided by NXP is not executed

Below is the part of SDK implemented for BUCK3:

/* BUCKxOUT_DVS0/1 control BUCK123 output */
 pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);

/* Also, set B3_ENMODE=2 (ON by PMIC_ON_REQ=H & PMIC_STBY_REQ=L) */
 pmic_reg_write(p, PCA9450_BUCK3OUT_DVS0, 0x1C);
 pmic_reg_write(p, PCA9450_BUCK3CTRL, 0x4A);

It would be great if anyone can guide us through this and help with possible solution for the same or suggest if any changes are to be made.

Thanks in advance.

Regards,

Zeel Shah

0 项奖励
回复
4 回复数

1,905 次查看
linda_zhang
Contributor IV
Settings of PMIC on our board for your reference:
 
/* decrease RESET key long push time from the default 10s to 10ms */
pmic_reg_write(p, BD71837_PWRONCONFIG1, 0x0);
 
/* unlock the PMIC regs */
pmic_reg_write(p, BD71837_REGLOCK, 0x1);
 
/* increase VDD_SOC to typical value 0.85v before first DRAM access */
pmic_reg_write(p, BD71837_BUCK1_VOLT_RUN, 0x0f);
 
/* increase VDD_DRAM to 0.975v for 3Ghz DDR */
pmic_reg_write(p, BD71837_BUCK5_VOLT, 0x83);
 
#ifndef CONFIG_IMX8M_LPDDR4
/* increase NVCC_DRAM_1V2 to 1.2v for DDR4 */
pmic_reg_write(p, BD71837_BUCK8_VOLT, 0x28);
#endif
 
/* lock the PMIC regs */
pmic_reg_write(p, BD71837_REGLOCK, 0x11);
 
return 0;
 

 

0 项奖励
回复

1,898 次查看
Zeel
Contributor II

Thanks @linda_zhang for your response but we are not using the same PMIC as that of yours, so not sure if your configuration can help much. 

Just FYI, even we've set the values of registers in same sequence and way as that of yours though 0.95V is not obtained on board as it should be as per register settings.

Regards,

Zeel Shah

0 项奖励
回复

1,921 次查看
Zeel
Contributor II

Hi community,

I would be grateful if anyone can guide me through this.

Looking forward to your suggestions.(@Yuri , @AllanAn , @guoweisun

 

Thanks & Regards,

Zeel Shah

0 项奖励
回复

1,889 次查看
AllanAn
NXP Employee
NXP Employee

Hi Zeel,

BUCK3 output logic is shown as below, I have checked your I2C command, it is OK to configure BUCK3 as 0.95V.

AllanAn_0-1658980057772.png

so I suggest to check:

Whether I2C command has been configured to PCA9450AA successfully or BUCK3 voltage configuraiton changed afterwards.

  1. read back the register for confirmation,
  2. Configure BUCK123_DVS as 0xAB to see if BUCK3 follow Bx_DVS_PRESET configuration.

if the 2 action did not valid, please check external hardware connected to see if BUCK3 voltage is affected by external componts.

 

 

Brs

Allan

 

0 项奖励
回复