Hi,
For a project, I would like a specific operating with iMX7 :
- Run FREERTOS on Cortex M4
- Run Linux/Yocto on Cortex A7
- Continual, Cortex M4 save data on NAND flash
- The main part of the time, Cortex A7 is sleeping and few time it wake up to process data (from NAND flash)
- NAND flash is share between Cortex M4 et Cortex A7.
Is it possible to have this configuration ?
Is there some example ?
Best regards
Hi victorien
yes such configuration is possible, NAND can be shared using DRC described in
sect.3.2 Resource Domain Controller (RDC) i.MX7D Reference Manual
http://cache.nxp.com/files/32bit/doc/ref_manual/IMX7DRM.pdf
Unfortunately I am not aware of examples of this case.
Best regards
igor
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Thinks for this answer.
Is there an application note which explain how to use the heterogeneous architecture (cortex M4 and A7) configure the cross compilation software and the SDK ?
one can look at linux documentation: