iMX7 Linux and FreeRTOS sharing ram

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iMX7 Linux and FreeRTOS sharing ram

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imanolallende
Contributor III

Our objective is to analyze the timing performance of the M4 with FreeRTOS, having Linux in the A7. Therefore, we think that a interest test is to stress the DDR from Linux and to see if the M4 tasks using DDR suffers any latency. However, we have seen some weird things.

  • Is it possible to know the bus utlization? Is there any counter for that? I know that in the iMX6 there was a MMDC Profiling Tool that calculate that.
  • It will interesting to have a detailed Architectural Block Diagram. The one in the Reference Manual is tto simple to know the Bus connections. Is there anyone available?
  • How does the AXI bus manage the priorities? The M4 has the higher priority? If the A7 and M4 try tio write in the DDR at the same time, which one has priority?

Thank you!

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828 次查看
igorpadykov
NXP Employee
NXP Employee

Hi Imanol

unfortunately i.MX7 has different ddr controller than i.MX6 and memory profiling tool is

not available for it. Detailed architectural block diagram was never provided for

customers for any i.MX processors and considered as internal confidential

documentation, sorry.

Best regards
igor
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828 次查看
imanolallende
Contributor III

Thank you!

As profiling tool is not available, is there an hardware counter or something to know the bus utlization?

And how does the AXI bus manage the priorities? The M4 has the higher priority? If the A7 and M4 try tio write in the DDR at the same time, which one has priority?

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828 次查看
igorpadykov
NXP Employee
NXP Employee

shortly, M4 core is not optimized for use with the DDR memory, primarily because the
pathway from the M4 core goes through an intermediate network interconnect.

Also may be useful:

IMX7 M4 caching and execution speed 

https://community.nxp.com/thread/459977?commentID=953330#comment-953330 

Best regards
igor

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