iMX6SDL CCM_CBCMR GPU2D_CORE_SEL value 0b11 is listed as "derive clock from Reserved PFD" but out of reset this is set.
Is this another error in the RM and should this be PLL2_PFD2 (396 MHz) (same as in the iMX6DQ), or is this option invalid and shouldn't be used for iMX6SDL?
Hi Michel
RM is correct, value 0b11 is "clock from Reserved PFD".
In software one needs to select correct value
for CCM_CBCMR GPU2D_CORE_SEL.
Best regards
chip
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Chip,
Are you absolutely sure about this?
Even after the GPU driver loads on my iMX6SDL board GPU2D_CORE_SEL is still set to 0b11, and the GPU driver is working...It could be that the GPU driver is not setting up the GPU2D_CORE clock correctly (but things still work?), or the RM is wrong. Knowing what I know about the quality of the RM I lean towards the latter... :smileyplain:
Just want to make sure you are absolutely sure about the RM being correct... Please confirm (and if possible, share the source of information you based your answer on, if possible).
Thanks again!