iMX6 IPU: SYNC field in WACK + BMA microcode

[ensc]

Hi,

iMX6Q Reference Manual lists in table 37-26 "DC template's commands description" the SYNC field sometimes with a length of 4 bits (e.g. for RD, WSTS) and sometimes with 3 bits (WACK + BMA).

In case of WACK, the WAVEFORM and GLUELOGIC fields are shifted one position right too.

Is this a bug in the documentation (e.g. SYNC is always 4 bits and fields in WACK are at the usual position)?  Or is this intended?

[igorpadykov]

Hi Enrico

SYNC field for WACK command is 3 bits, the same can be found in IPU description

for older i.MX processors.

Best regards

igor

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[ensc]

SYNC field for WACK command is 3 bits,

Units #8, #9 and #10 cam not be addressed with WACK or BMA than, right?

the same can be found in IPU description for older i.MX processors.

At least in iMX53 Reference Manual, this seems to be caused be a malformed table (e.g. the N_CLOCK_OPERAND field is 1 bit only; the right bits in WACK + BMA are unspecified).

[igorpadykov]

in iMX51 Reference Manual Table 42-426. DC template’s commands description

it is shown more clear.

~igor