iMX51 - NFC - NANDF_RB_B

[BojanMerela]

I am trying to get iMX51 NFC working with flash chip: HY27UF2G2B (HYNIX) ...

1. initial setup (NFC_CFG1 ... NFC_CFG3)

2. send reset command (0xFF) and measure RB signal (the device is busy for aprox. 5us so I am assuming the device accepted the command)

3. I am waiting in a loop for INT bit and it doesn't get set (NFC_IPC)

4. no further command can be send

5. RB_B bit in NFC_IPC is always zero (busy) even before the reset command is sent

6. when setting NANDF_RB_B pad to GPIO I can see that RB signal is high

Any clues why this doesn't work? axi_clk to flash clk ratio problem? pad settings? other settings?

regards,

Bojan

[BojanMerela]

tnx for the quick response! we didn't have pull ups, now it is working! I should read errata sheet more carefully :)

thank you and best regards,

Bojan

[mdc]

You need to make sure all 4 R/B lines are high when coming out of reset when booting from NAND. Check erratum ENGcm11189 in the errata document available on the mx51 page on freescale.com

[BojanMerela]

found out that Rp resistance was missing on open drain output (RB flash pin), still not working... tried 2.2K and 4.4K...

I will check clock ratios now...