Hi,
for i.Mx6Q the reference manual states about the EIM bus "External Interrupt support, RDY_INT signal function as external interrupt". My problem is that I can not find any further information about this feature. Looking in the description about external signals I can not find any interrupt signal. I have also checked in the IO Mux Tool and can not find any interrupt pin for EIM there either.
The use-case is a i.Mx6 connected to a FPGA thorugh the EIM bus. Then it would be nice to have some interrupt from FPGA to processor. Is this possible to solve with EIM or in some other way?
Regards,
/Peter
Hi Peter
RDY_INT function is assigned to the EIM_WAIT pin.
Best regards
igor
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Hi Igor,
thanks for your reply. This was not easy to understand from the manual. A follow up question on this then, the timing diagram for "Burst (Synchronous Mode) Write Memory Access Timing - BCD=1" includes a signal called "WAIT". Is the signal WAIT in this diagram the same as EIM_WAIT?
In our project we are going to communicate between a FPGA and a i.Mx6 over the EIM bus. In general I find the documentation around EIM quite poor. Do you have any other source of information that is useful for a FPGA engineer going to implement a EIM slave?
Best regards,
/Peter
Hi Peter
yes, signal called "WAIT" is the same as EIM_WAIT.
I can not suggest any public source of information, except
RM. Info about RDY_INT function was from internal ticket 1-890899012
provided from iMX application team.
Best regards
igor