i.MX8M Mini VPU H1 H.264 encoder support for interlaced video

[vincentz63]

Does the i.MX8M Mini's VPU H1 H.264 encoder support interlaced video? The only reference I can find is page 4758 of the RM Rev3 which states the following:

Fr types: Progressive, Interlaced fields

What does this mean?

If it does support interlaced, how do I use it?

[vincentz63]

I came accross H264TestBench.c which seems to be a functional test suite for the Hantro H1 encoder. It expects to load files 'input.yuv1, input.yuy2'. Those files are not included in the repo. If you could supply them to us we could check what the interlaced files look like to determine how the fields must be supplied.

[vincentz63]

We have been able to get the encoder to encode interlaced video by modifying the imx-vpu-hantro library to run some tests.

Specifically we set "cfg.viewMode=H264ENC_INTERLACED_FIELD" in imx-vpu-hantro-1.15.0/openmax_il/source/encoder/encoder_h264.c.

For info, this causes the code below to be executed in H264Init.c.

However, I am not clear how the fields should be supplied to the H1 encoder.

By experimenting I found the H1 encoder appears to expect each field in a separate buffer.

I would like to know if it is possible for the H1 encoder to produce an interlaced stream from a single buffer containing both fields:

• either with the two fields consecutively located in the buffer
• or with the fields interleaved (so the frame has already been de-interlaced using the DMA engine) - this is my prefered format.

    else /*if(pEncCfg->viewMode == H264ENC_INTERLACED_FIELD)*/
    {
        inst->numViews = 1;
        inst->numRefBuffsLum = 2;
        inst->numRefBuffsChr = 3;
        inst->seqParameterSet.frameMbsOnly = ENCHW_NO;
        /* 2 ref frames will be buffered so each field will reference previous
           field with same parity (except for I-frame bottom referencing top) */
        inst->seqParameterSet.numRefFrames = 2;
        inst->interlaced = 1;
        /* Map unit 32-pixels high for fields */
        height = 32 * ((pEncCfg->height + 31) / 32);
    }

[joanxie]

refer to the VPU IP spec, the H1 can support interlaced video

[vincentz63]

What do you mean by "VPU IP spec"? Is this another document? All I can find in the ref Manual is "Fr types: Progressive, Interlaced fields", page 4758. How do I enable it?

[joanxie]

this same as reference manual mentions, you can refer to the vpu api document too

[vincentz63]

The only references to interlaced video is for the Decoder, none of the structures for the Encoder have an interlace field.

So, if the Encoder supports interlaced video, as stated in the Ref Manual, how do I enable it?

[vincentz63]

It seems we are back to square 1... is it possible to encode interlaced video with the H1 encoder in the i.MX8MMini? If so, can you point me to the relevant documentation and/or example please?  As far as I can see, what you have pointed me so far pertains only to the decoder.

[joanxie]

for H1 encoder IP, which can support interlaced video according to the reference manual, but for VPU API, which couldn't handle interlaced video on encoding, but decoder api does

[vincentz63]

Sorry but I am not sure I understand what you mean.

The Ref Manual indicates the i.MX8M Mini's H.264 encoder supports interlaced video and you seem to confirm it.

So my question remains: how do I program the encoder for intelaced video and how must I present the video frames to it? As far as I can see this appear in none of the documents I have and the VPU API does not seem to support it (according to your comment).

Or are you saying is that the H1 encoder can support interlaced, but NXP does not know how to use it?

[joanxie]

my understanding is that vpu can accept interlaced video, but imx8mm doesn't support de-interlacing on HW, customer can use SW de-interlacing to convert the video from camera then put the video to the VPU

[vincentz63]

That seems to contradict the doc you refered me to. How did you reach this conclusion?

The only mention of 'interlace' in 

i.MX_VPU_Application_Programming_Interface_Linux_Reference_Manual.pdf

is VpuDecInitInfo::nInterlace which is described as 'Whether video is interlaced.'. This structure is for the decoder, not the encoder.

The other reference to interlace is in the Ref Manual Rev3 page 4758 which states the following:

Fr types: Progressive, Interlaced fields

What does that mean? Does it apply to the encoder or the decoder? If the encoder, how can I encode interlaced video?