i.MX6Q DCIC: ROI checksum not changing

[ed_langley]

Hello

I am trying to use the Display Content Integrity Checker on the i.MX6Q running an RTOS. Sabrelite Rev D, display connected to the HDMI port.

So far I have set the registers manually to enable DCIC1 (the first one), and set the first region of interest top left co-ords (0,0), bottom left at (400, 400).

Bits in IOMUX_GPR10 [1:0] are set to 11b to route the HDMI signals back into DCIC1. When I did this, a checksum value appeared in DCIC1_DCICRCS (at 0x020E401C).

However: when the contents of the display change within the top left 400x400 pixel area on the screen, the checksum doesn't change. I'm checking the register at the command line every few seconds, with the display contents in the ROI different every time.

I only have one DCIC enabled, which only has one ROI enabled.

I changed the ROI to be the full 1024x768 dimensions of the display, with an animation running on screen.

I've tried setting the status bits to clear the interrupts in DCIC1_DCICS (bit 0 is correctly getting set because my reference checksum value of 0x0 doesn't match).

I've tried disabling the ROI (The calculated checksum clears to 0x0 when disabled), clearing the status bits, and re-enabling the ROI.

Still the checksum is the same value.

The only way the checksum value changes, is if I disable the HDMI output momentarily (By killing the display driver) and re-enable it again. Then a new CRC value appears in DCIC1_DCICRCS.

The behaviour I expected from the DCIC is that, when the actual display contents within the ROI changes, on the display, and therefore in the HDMI signal, the calculated CRC changes, every frame (60Fps).

[igorpadykov · Accepted solution]

Hi Ed

suggest to look at DCIC imx-test unit test example

source located at: <Yocto_BuildDir>/linux –test/test/mxc_dcic_test

description can be found in Chapter 55 Display Content Integrity Checker (DCIC)

i.MX_6_Linux_Reference_Manual.pdf L3.10.53_1.1.0_LINUX_DOCS

i.MX6Q|i.MX 6Quad Processors|Quad Core|Freescale

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

[ed_langley]

Hi Igor

Thanks for the suggestion, sorry for the delay I have been sidetracked by other matters on the project, and also, having been working on QNX I hadn't noticed the latest Linux BSP from Freescale had come out.

On your advice I have downloaded the L3.10.53 BSP images from the Freescale i.MX6 downloads page.

I booted a RevB SabreSD board, which has an i.MX6Q rev1.1 chip on it, using u-boot-imx6qsabresd_sd.imx, then loaded the zImage along with imx6q-sabresd.dtb, and the rootfs fsl-image-gui-fb-imx6qdlsolo.ext3.

After logging in I ran the test:

root@imx6qdlsolo:~# /unit_tests/mxc_dcic_test.out

Opened fb0

After that first printf from mxc_dcic_test.c, the board appears to have hung. I tried connecting to the board via ssh, ran the test through that terminal, same result, the prompt on the serial port is again non-responsive, so it seems like a lock up in the driver?

I presume somebody has had the test working? It would be useful to see that so I can establish the expected behaviour.

I have also set up the Freescale Yocto release tree and prepped the kernel and imx-test recipes to examine the source, I shall check my polarity settings in DCICC for suitability with the HDMI signal, but other than that I didn't find anything going on in there I'm not already doing,

Has anybody else seen mxc_dcic_test.out working? Have I got it set up incorrectly?

Thanks

Ed

[igorpadykov]

Hi Ed

i.MX6Q rev1.1 is old revision and not more supported by FSL BSPs,

refer to attached doocument p.11 Table 7. Known Issues and Workarounds

Freescale decided to drop the preproduction(TO1.1/TO1.0) chip support.

~igor

[ed_langley]

Hi Igor

In the event, the DCIC Linux driver does work OK on the 1.1 chip I was using. It was only when I took the board back to the office, where there was a display I could plug into it, that it became obvious that I needed to add the appropriate video arguments to the kernel command line in U-boot, to enable the video driver. Once the HDMI output was on, the DCIC driver and test ran fine.

Anyhow, the Linux code was a useful reference, and my driver is working now. Thanks for the help.

Cheers

Ed