i.MX6: Documentation about DVFS related registers in GPC

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i.MX6: Documentation about DVFS related registers in GPC

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valterminute_
Contributor I

I noticed that documentation about DVFS in the GPC chapter and specific documentation about DVFSC_* registers in that same chapter has been removed in the latest revisions of the reference manual of both i.MX6 dual/quad and solo/duallite.

I am talking about registers from 0x020dC180 to 0x020DC1C0.

The documentation was not very clear, but I was surprised to see it disappear.

I also noticed that those registers are not used in the Linux BSP (where the logic to increase/decrease CPU speed is implemented in software).
On the other side the HW DVFS feature is quite useful for people working on OSs that don't have such a management system built-in. Being able to trigger actions based on system load using HW is quite interesting.

Why has this information been removed?

Is that feature not working or is suggested to not use it?

Has this information been moved to a different place?

(no mention about this in the revision notes that just say that it has been deleted)

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igorpadykov
NXP Employee
NXP Employee

Hi valterminute

hardware dvfs module was used in older i.MX processors, like i.MX53,

in i.MX6 it is not used and related information was removed from documentation.

Best regards
igor
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valterminute_
Contributor I

What does "not used" mean?

As far as I could see the registers are there.

They should not be used because there are some hardware issues?

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igorpadykov
NXP Employee
NXP Employee

it was not validated and not used in software bsps.

Best regards
igor

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