Hi community,
I have a question about i.MX6SDL, i.MX6DQ DDR design.
Please see No.4 of Table 1-1 in IMX6DQ6SDLHDG "Rev.0".
It says "DRAM_SDCKE0 and DRAM_SDCKE1 should be connected to individual 10 kΩ5% resistors to GND."
On the other hand, No.4 of Table 2-1 in IMX6DQ6SDLHDG "Rev.1", It says "DRAM_SDCKE0 and DRAM_SDCKE1 no longer require external 10 kΩresistors to GND to minimize current drain during deep sleep mode (DSM)."
In fact, I got a following reply in past in SR# 1-1132121434.
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Internal pull down resistor of 100 KOhm provides relatively “weak” pulling down.
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Why the recommended disign was changed?
This weak pull down issue have been fixed?
Best Regards,
Satoshi Shimoda
Solved! Go to Solution.
Hi Satoshi
please check recommendations in latest HW Design Checklist
HW Design Checking List for i.MX6DQSDL
10k may be needed to improve noise immunity (for example
strong EMI) since internal are weak.
Best regards
igor
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Hi Satoshi
please check recommendations in latest HW Design Checklist
HW Design Checking List for i.MX6DQSDL
10k may be needed to improve noise immunity (for example
strong EMI) since internal are weak.
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Hi Igor,
Thank you for your reply.
According to your reply, the external resistor is not needed if a product is designed with good EMC, right?
Best Regards,
Satoshi Shimoda
Hi Satoshi
yes right.
Best regards
igor
Hi Igor,
Thank you for your reply.
OK, I understood.
And I posted a new question about Ref7 (DDR SDCKE) of the design checking list to HW Design Checking List for i.MX6DQSDL.
Would you support it also if you can?
Best Regards,
Satoshi Shimoda