Yocto Zeus for iMX8QM: lsio_pwm0-7 support

[pierluigi_p]

Hi,

in newer kernels 5.4.x, the device tree structure is quite different and the nodes lsio_pwm0-7 are completely missing.

Porting them from previous 4.14.x seems to be quite tricky.

Do you have any sample implementation working for iMX8QM?

Thanks

Regards

Pier

[giuseppepagano1]

Hi, have you find any solution ?

We are now facing the same problem, and we think we should now refer to the Low Power Clock Gate (lpcg_pwm[0-7]) taking example from imx8qxp. Neverless I can't understand the relation between lpcg_pwm and lsio_pwn (see memor map descriptio in attached pdf).

Bye

Giuseppe

[leonlin1]

Hi Joan,

            We are using NXP Linux BSP Yocto Gatesgarth version now, the kernel is 5.10.9. and we need to enable LSIO PWM2 (IMX8QM_GPT1_COMPARE_LSIO_PWM2_OUT) but we also can't find any LSIO PWM0~7 definition or examples in freescale devicetree folder. In NXP Linux BSP 4.19.35, the related LSIO PWM definintion is in fsl-imx8qm-device.dtsi as below. Could you tell us where can we find a example or related definition about LSIO PWM0~7 for reference? Thanks~

fsl-imx8qm-device.dtsi in kernel_imx\arch\arm64\boot\dts\freescale

pwm0: pwm@5d000000 {
compatible = "fsl,imx8qm-pwm", "fsl,imx27-pwm";
reg = <0x0 0x5d000000 0 0x10000>;
clocks = <&clk IMX8QM_PWM0_IPG_MSTR_CLK>,
<&clk IMX8QM_PWM0_HF_CLK>;
clock-names = "ipg", "per";
assigned-clocks = <&clk IMX8QM_PWM0_HF_CLK>;
assigned-clock-rates = <24000000>;
#pwm-cells = <2>;
power-domains = <&pd_lsio_pwm0>;
status = "disabled";
};

pwm1: pwm@5d010000 {
compatible = "fsl,imx8qm-pwm", "fsl,imx27-pwm";
reg = <0x0 0x5d010000 0 0x10000>;
clocks = <&clk IMX8QM_PWM1_IPG_MSTR_CLK>,
<&clk IMX8QM_PWM1_HF_CLK>;
clock-names = "ipg", "per";
assigned-clocks = <&clk IMX8QM_PWM1_HF_CLK>;
assigned-clock-rates = <24000000>;
#pwm-cells = <2>;
power-domains = <&pd_lsio_pwm1>;
status = "disabled";
};

pwm2: pwm@5d020000 {
compatible = "fsl,imx8qm-pwm", "fsl,imx27-pwm";
reg = <0x0 0x5d020000 0 0x10000>;
clocks = <&clk IMX8QM_PWM2_IPG_MSTR_CLK>,
<&clk IMX8QM_PWM2_HF_CLK>;
clock-names = "ipg", "per";
assigned-clocks = <&clk IMX8QM_PWM2_HF_CLK>;
assigned-clock-rates = <24000000>;
#pwm-cells = <2>;
power-domains = <&pd_lsio_pwm2>;
status = "disabled";
};

pwm3: pwm@5d030000 {
compatible = "fsl,imx8qm-pwm", "fsl,imx27-pwm";
reg = <0x0 0x5d030000 0 0x10000>;
clocks = <&clk IMX8QM_PWM3_IPG_MSTR_CLK>,
<&clk IMX8QM_PWM3_HF_CLK>;
clock-names = "ipg", "per";
assigned-clocks = <&clk IMX8QM_PWM3_HF_CLK>;
assigned-clock-rates = <24000000>;
power-domains = <&pd_lsio_pwm3>;
#pwm-cells = <2>;
status = "disabled";
};

pwm4: pwm@5d040000 {
compatible = "fsl,imx8qm-pwm", "fsl,imx27-pwm";
reg = <0x0 0x5d040000 0 0x10000>;
clocks = <&clk IMX8QM_PWM4_IPG_MSTR_CLK>,
<&clk IMX8QM_PWM4_HF_CLK>;
clock-names = "ipg", "per";
assigned-clocks = <&clk IMX8QM_PWM4_HF_CLK>;
assigned-clock-rates = <24000000>;
#pwm-cells = <2>;
power-domains = <&pd_lsio_pwm4>;
status = "disabled";
};

pwm5: pwm@5d050000 {
compatible = "fsl,imx8qm-pwm", "fsl,imx27-pwm";
reg = <0x0 0x5d050000 0 0x10000>;
clocks = <&clk IMX8QM_PWM5_IPG_MSTR_CLK>,
<&clk IMX8QM_PWM5_HF_CLK>;
clock-names = "ipg", "per";
assigned-clocks = <&clk IMX8QM_PWM5_HF_CLK>;
assigned-clock-rates = <24000000>;
#pwm-cells = <2>;
power-domains = <&pd_lsio_pwm5>;
status = "disabled";
};

pwm6: pwm@5d060000 {
compatible = "fsl,imx8qm-pwm", "fsl,imx27-pwm";
reg = <0x0 0x5d060000 0 0x10000>;
clocks = <&clk IMX8QM_PWM6_IPG_MSTR_CLK>,
<&clk IMX8QM_PWM6_HF_CLK>;
clock-names = "ipg", "per";
assigned-clocks = <&clk IMX8QM_PWM6_HF_CLK>;
assigned-clock-rates = <24000000>;
#pwm-cells = <2>;
power-domains = <&pd_lsio_pwm6>;
status = "disabled";
};

pwm7: pwm@5d070000 {
compatible = "fsl,imx8qm-pwm", "fsl,imx27-pwm";
reg = <0x0 0x5d070000 0 0x10000>;
clocks = <&clk IMX8QM_PWM7_IPG_MSTR_CLK>,
<&clk IMX8QM_PWM7_HF_CLK>;
clock-names = "ipg", "per";
assigned-clocks = <&clk IMX8QM_PWM7_HF_CLK>;
assigned-clock-rates = <24000000>;
#pwm-cells = <2>;
power-domains = <&pd_lsio_pwm7>;
status = "disabled";
};

[du1]

I also need a solution for this. There's a bunch of imx8qm-ss-*.dtsi files but no imx8qm-ss-pwm.dtsi, so the PWMs are not usable, and directly reusing the PWM definitions from the 4.14 kernels isn't possible because the clock definitions have also changed.

Here's a link to the PWM nodes from kernel 4.14: fsl-imx8qm-device.dtsi\freescale\dts\boot\arm64\arch - linux-imx - i.MX Linux kernel 

[joanxie]

I couldn't find nodes lsio_pwm0-7  in the 4.14.x:
"fsl-imx8qm-mek.dtsi\freescale\dts\boot\arm64\arch - linux-imx - i.MX Linux kernel "

could you send the link to me?

[pierluigi_p]

Hi Joan,

in kernel 4.14, pwm are available starting from here

   fsl-imx8qm-device.dtsi\freescale\dts\boot\arm64\arch - linux-imx - i.MX Linux kernel 

The name was just pwmX, but were actually referring to LSIO area.

Please let me know if you need further details.

Thanks

Regards

Pier