Hello,
Using Extradebug Registers is special Freescale (NXP) JTAG-based technology, used mainly
for internal (manufacturer) testing. It requires general JTAG interface, that usually is used for BSDL
testing. Please refer to section 67.10 (Programmable Registers) of the RM : “SJC registers are only
accessible by JTAG interface. They are not memory mapped to processor address space, so the absolute
addresses provided by default in the SJC memory map are not valid.”
Have a great day,
Yuri
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