According to the figure 60-2 chip reset scheme under external PMIC control in IMX6SDLRM.pdf, PMIC_ON_REQ can be ignited by TEST_MODE, ONOFF and SNVS wake-up alarm. Where can we find more information of SNVS wake-up alarm like detail explanation or register definition?
Hi m.c.
one can try to use Security Reference Manual on link
Q&A: How is mx6 PMIC_ON_REQ under SW control?
or request additional info entering service request.
Best regards
igor
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