Watchdog Timeout Register Changes on i.MX6ULL?

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Watchdog Timeout Register Changes on i.MX6ULL?

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198 次查看
JohnKlug
Senior Contributor I

I added some code in early U-Boot to save the registers related to the JTAG_TDI pad, as we are using it as  GPIO, and were seeing a signal on a watchdog reset.

It appears that when you do a watchdog reset, the registers are not all reset to the default settings as the POR_B pin does.

For instance, it appears that GPIO1_GDIR is being set to input, which is the default and expected.

However these two IOMUX registers were not set back to defaults, which caused an issue for us:
IOMUXC_SW_PAD_CTL_PAD_JTAG_TDI
SW_MUX_CTL_PAD_JTAG_TDI

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145 次查看
Rita_Wang
NXP TechSupport
NXP TechSupport

I am afraid we do not have this document for it.

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158 次查看
JohnKlug
Senior Contributor I

To fix the issue I added pull up enabled to Linux device tree so that when a reset is enabled, the pin does not float.  But it was curious that the defaults for the IOMUX are not applied, but for GPIO they are applied.

 

Is there documentation that explains which registers are excluded from a software reset?

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146 次查看
Rita_Wang
NXP TechSupport
NXP TechSupport

I am afraid we do not have this document for it.

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166 次查看
Rita_Wang
NXP TechSupport
NXP TechSupport

How about your hardware design, as cold reset can make all reset,

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