All,
I'm trying to connect openOCD (Open On-Chip Debugger 0.6.1) to the imx28evk. Is there some HW switches that need to configured? Here is the output and command line:
sudo openocd -f interface/jtagkey-tiny.cfg -f board/imx28evk.cfg
Open On-Chip Debugger 0.6.1 (2012-10-27-10:53)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.sourceforge.net/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
adapter_nsrst_delay: 100
jtag_ntrst_delay: 100
dcc downloads are enabled
imx28evk_init
Error: An adapter speed is not selected in the init script. Insert a call to adapter_khz or jtag_rclk to proceed.
in procedure 'init'
tcmichals@tcmichals-RP829AV-ABA-d4790y:~$ sudo openocd -f interface/jtagkey-tiny.cfg -f board/imx28evk.cfg
Open On-Chip Debugger 0.6.1 (2012-10-27-10:53)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.sourceforge.net/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
adapter speed: 10 kHz
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
adapter_nsrst_delay: 100
jtag_ntrst_delay: 100
dcc downloads are enabled
imx28evk_init
Info : clock speed 10 kHz
Error: JTAG scan chain interrogation failed: all ones
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway...
Error: imx28.cpu: IR capture error; saw 0x0f not 0x01
Warn : Bypassing JTAG setup events due to errors
Info : Embedded ICE version 15
Error: unknown EmbeddedICE version (comms ctrl: 0xffffffff)
Info : imx28.cpu: hardware has 2 breakpoint/watchpoint units
Warn : WARNING: unknown debug reason: 0xf
Warn : ThumbEE -- incomplete support
已解决! 转到解答。
OK figured it out, just read the map file...
0x0000000000000000 . = 0x0
0x0000000000000000 . = ALIGN (0x4)
.text 0x0000000040000100 0x2b11c
0x0000000040000100 __image_copy_start = .
arch/arm/cpu/arm926ejs/start.o(.text)
.text 0x0000000040000100 0x480 arch/arm/cpu/arm926ejs/start.o
0x0000000040000100 _start
So this translates to:
> load_image /home/tcmichals/Projects/Cygnetron/newProject/buildroot/cygBuildRoot/images/u-boot.bin 0x040000100
No working memory available. Specify -work-area-phys to target.
not enough working area available(requested 24)
no working area available, falling back to memory writes
250556 bytes written at address 0x40000100
downloaded 250556 bytes in 17.861929s (13.699 KiB/s)
> resume 0x040000100
>
Now u-boot does boot (Need to fix other issues ...)
OK, it is connecting, I set the dip switches to JTAG mode. I do the following:
> load_image /home/tcmichals/Projects/Cygnetron/newProject/buildroot/cygBuildRoot/images/u-boot.bin
No working memory available. Specify -work-area-phys to target.
not enough working area available(requested 24)
no working area available, falling back to memory writes
250556 bytes written at address 0x00000000
downloaded 250556 bytes in 17.128075s (14.286 KiB/s)
> resume 0x41008000
Is the correct addresses?
OK figured it out, just read the map file...
0x0000000000000000 . = 0x0
0x0000000000000000 . = ALIGN (0x4)
.text 0x0000000040000100 0x2b11c
0x0000000040000100 __image_copy_start = .
arch/arm/cpu/arm926ejs/start.o(.text)
.text 0x0000000040000100 0x480 arch/arm/cpu/arm926ejs/start.o
0x0000000040000100 _start
So this translates to:
> load_image /home/tcmichals/Projects/Cygnetron/newProject/buildroot/cygBuildRoot/images/u-boot.bin 0x040000100
No working memory available. Specify -work-area-phys to target.
not enough working area available(requested 24)
no working area available, falling back to memory writes
250556 bytes written at address 0x40000100
downloaded 250556 bytes in 17.861929s (13.699 KiB/s)
> resume 0x040000100
>
Now u-boot does boot (Need to fix other issues ...)
Hi Tim,
How did you fix your JTAG mode booting problem? I saw you had ERROR message below?
Info : clock speed 10 kHz
Error: JTAG scan chain interrogation failed: all ones
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway...
Error: imx28.cpu: IR capture error; saw 0x0f not 0x01
Warn : Bypassing JTAG setup events due to errors
Info : Embedded ICE version 15
Error: unknown EmbeddedICE version (comms ctrl: 0xffffffff)
Info : imx28.cpu: hardware has 2 breakpoint/watchpoint units
Warn : WARNING: unknown debug reason: 0xf
Warn : ThumbEE -- incomplete support
Thanks,
Anne
Hello,
could you post your imx28.cfg and imx28evk.cfg? I'm trying the same as you did but it fails with this message: "memory write caused data abort (address: 0x47000000, size: 0x4, count: 0xe1f2)"
I'm also not sure if the imx28evk_init procedure is called correctly. I placed some echos in it which don't show up on starting openocd. When calling it later by hand I get complaints about the target being not halted despite the fact that openocd reported the target as halted on startup.
Do you have any hints?
Regards
Christoph
The problem was that our platform does not have external regulators for 4.2V. So it relies entirely on the internal ones of the i.MX28. The start up script for the i.MX28EVK assumes that the regulators on the EVK are already powered.
Reading AN4199 chapter '3.1.3 4P2 Power Source' I came up with this OCD code to bring up the 4.2V supply:
#init 4P2 rail
#HW_POWER_DCDC4P2[TRG] = 0
#is reset state -> nothing to do
#HW_POWER_DCDC4P2[ENABLE_4P2] = 1
mww 0x80044080 0x00800018
sleep 20
#HW_POWER_DCDC4P2[ENABLE_4P2] = 1
mww 0x80044034 0x00400000
sleep 20
#HW_POWER_CHARGE[ENABLE_LOAD] = 1
mww 0x80044014 0x00001000
sleep 20
#HW_POWER_5VCTRL[PWD_CHARGE_4P2] = 0
mww 0x80044018 0x00300000
sleep 20
#HW_POWER_DCDC4P2[ENABLE_DCDC] = 1
mww 0x80044080 0x00C00018
sleep 20
#charge 4p2 cap
#step up HW_POWER_5VCTRL[CHARGE_4P2_ILIMIT]
mww 0x80044014 0x00002000
sleep 1
mww 0x80044014 0x00004000
sleep 1
mww 0x80044014 0x00008000
sleep 1
mww 0x80044014 0x00010000
sleep 1
mww 0x80044014 0x00020000
sleep 20
After that the initialization can continue with the script as it is in OpenOCD.