Use UUU to flash the NAND on iMX6ULL custom board

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Use UUU to flash the NAND on iMX6ULL custom board

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raymondman
Contributor II

Hi,

I'm trying to flash an i.MX6ULL custom board with UUU via the OTG USB port. The kernel version is

Debian Buster 10 with imx_4.14.78_1.0.0_ga_var01 Linux release (https://variwiki.com/index.php?title=Debian_Build_Release&release=RELEASE_BUSTER_V1.1_DART-6UL#Build...)

Here are my questions.

1) In the link below, it mentions CONFIG_FASTBOOT has to be enabled in U-boot. However, the build has errors after I enable it. Do I really need fastboot support?

https://community.nxp.com/t5/i-MX-Processors/iMX6ULL-BSP-support-for-UUU/m-p/1000567

2) It seems I need a script for UUU to program u-boot, u-boot environment, SPL, kernel, dtb, rootfs to the NAND flash. If so, is there a sample script for reference? or a standard script for iMX6ULL?

3) In the link below, it mentions 

"Compile zImage of MFGTOOL tool configuration, ie imx_v7_mfg_defconfig configuration, generate zImage into In the mfgtools/Profiles/Linux/OS Firmware/firmware/ directory,"

https://community.nxp.com/t5/i-MX-Processors/IMX6ULL-MFGTOOL-Cannot-Write-System/m-p/831379

I do not see imx_v7_mfg_defconfig in the kernel source code. I think it is necessary for older version of mfgtools. I don't need to do so in UUU. Am I right?

Please help! 

Many thanks!

Raymond

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nxf46838
NXP TechSupport
NXP TechSupport

Hi,

Please make sure that the boot configuration, be it fuses or dip switch, is correct.

Regarding flashing uboot and rootfs it is possible by using UUU, you'll need initramfs as well for this, the process is similar to old mfgtool.

You may refer to the following script:
https://github.com/NXPmicro/mfgtools/wiki/Sample-script#burn-nand-flash-by-linux-kernel

Best regards,
Aldo.

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raymondman
Contributor II

Hi,

I think I have found out the answers of the above questions. But I encounter another problem when I try to run the bootloader on my custom board with uuu. 

raymondman_0-1622198478167.png

It shows "cannot find valid IVT header". I have already goolged it but find little info. Can anyone explain what the problem is and advise any solution?

Many thanks!

Raymond

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raymondman
Contributor II

Hi,

I can program an u-boot from NXP successfully. Thus, it seems I am missing something when I build the u-boot. Can anyone help?

Many thanks!

Raymond

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nxf46838
NXP TechSupport
NXP TechSupport

Hello,

you may check that your uboot defconfig have all configuration set for UUU to work correctly, for this you may take our EVK defconfig as reference

https://source.codeaurora.org/external/imx/uboot-imx/tree/configs/mx6ull_14x14_evk_nand_defconfig?h=...

Best regards,
Aldo.

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raymondman
Contributor II

Hi Aldo,

Thanks for your reply. Before I move on to U-boot, I need to go back to do DDR calibration first. I use NXP DDR test tool to do the calibration but encounter the problem which has been mentioned in many old posts. Below is the result.


============================================
DDR Stress Test (3.0.0)
Build: Dec 14 2018, 14:13:23
NXP Semiconductors.
============================================

============================================
Chip ID
CHIP ID = i.MX6 UltraLiteLite(0x65)
Internal Revision = TO1.1
============================================

============================================
Boot Configuration
SRC_SBMR1(0x020d8004) = 0x000000b0
SRC_SBMR2(0x020d801c) = 0x01000001
============================================

ARM Clock set to 528MHz

============================================
DDR configuration
DDR type is DDR3
Data width: 16, bank num: 8
Row size: 16, col size: 10
Chip select CSD0 is used
Density per chip select: 1024MB
============================================

Current Temperature: 41
============================================

DDR Freq: 297 MHz

ddr_mr1=0x00000000
Start write leveling calibration...
running Write level HW calibration
MPWLHWERR register read out for factory diagnostics:
MPWLHWERR PHY0 = 0x00000e0f

Write leveling calibration completed, update the following registers in your initialization script
MMDC_MPWLDECTRL0 ch0 (0x021b080c) = 0x00040000
Write DQS delay result:
Write DQS0 delay: 0/256 CK
Write DQS1 delay: 4/256 CK

Starting DQS gating calibration
. HC_DEL=0x00000000 result[00]=0x00000011
. HC_DEL=0x00000001 result[01]=0x00000011
. HC_DEL=0x00000002 result[02]=0x00000011
. HC_DEL=0x00000003 result[03]=0x00000011
. HC_DEL=0x00000004 result[04]=0x00000011
. HC_DEL=0x00000005 result[05]=0x00000011
. HC_DEL=0x00000006 result[06]=0x00000011
. HC_DEL=0x00000007 result[07]=0x00000011
. HC_DEL=0x00000008 result[08]=0x00000011
. HC_DEL=0x00000009 result[09]=0x00000011
. HC_DEL=0x0000000A result[0A]=0x00000011
. HC_DEL=0x0000000B result[0B]=0x00000011
. HC_DEL=0x0000000C result[0C]=0x00000011
. HC_DEL=0x0000000D result[0D]=0x00000011
ERROR FOUND, we can't get suitable value !!!!
dram test fails for all values.

Error: failed during ddr calibration

=====

Can you tell from the above result which byte, byte0 or byte1, is faulty?

As it states,

Write DQS0 delay: 0/256 CK
Write DQS1 delay: 4/256 CK

Are there any hints to solve the problem by setting DQS delay?

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raymondman
Contributor II

Hi Aldo,

Finally I fixed a hardware issue and the DDR calibration can pass. However, I modified the register value accordingly and then run the DDR stress test which fails. Could you please advise the next steps I should check?

=========

============================================
DDR Stress Test (3.0.0)
Build: Dec 14 2018, 14:13:23
NXP Semiconductors.
============================================

============================================
Chip ID
CHIP ID = i.MX6 UltraLiteLite(0x65)
Internal Revision = TO1.1
============================================

============================================
Boot Configuration
SRC_SBMR1(0x020d8004) = 0x0000003f
SRC_SBMR2(0x020d801c) = 0x01000001
============================================

ARM Clock set to 528MHz

============================================
DDR configuration
DDR type is DDR3
Data width: 16, bank num: 8
Row size: 16, col size: 10
Chip select CSD0 is used
Density per chip select: 1024MB
============================================


DDR Stress Test Iteration 1
Current Temperature: 44
============================================

DDR Freq: 148 MHz
t0.1: data is addr test
Address of failure(step2): 0x80000000
Data was: 0x3b00fb00
But pattern should match address
Error: failed to run stress test!!!

=========

Many thanks!

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nxf46838
NXP TechSupport
NXP TechSupport

Hello,

If I understood correctly, you managed to pass test first time correct?

Then, you'll need to make sure that the changes were applied if you see the same result each time you run the tool.

Best regards,
Aldo.

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raymondman
Contributor II

Hi Aldo,

Thanks for your reply. After I set the correct DDR size, I can do the stress test successfully.

Now I can boot from USB via uuu. I try to program the u-boot to the NAND flash in the following two ways but no luck.

1) At U-boot, I load the u-boot.imx to the RAM and then use "nand write" to program it to the address 0 of the NAND. But the board does not boot up with the NAND. I check the chip select signal of the NAND with the oscilloscope that the board did access the NAND flash several times after power up. No output at the console.

2) Use "uuu -b nand u-boot.imx". But the board seems just boot up but does not program it to the NAND flash.

Would you please advise how I can boot up with the NAND flash? Also, can I program the rootfs to the NAND flash using uuu? Or I need to boot up to the Linux system with initramfs and program all stuff to the NAND with the Linux system?

Thanks!

 

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nxf46838
NXP TechSupport
NXP TechSupport

Hi,

Please make sure that the boot configuration, be it fuses or dip switch, is correct.

Regarding flashing uboot and rootfs it is possible by using UUU, you'll need initramfs as well for this, the process is similar to old mfgtool.

You may refer to the following script:
https://github.com/NXPmicro/mfgtools/wiki/Sample-script#burn-nand-flash-by-linux-kernel

Best regards,
Aldo.

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raymondman
Contributor II

Hi Aldo,

Thanks for your advice. I can use mfgtool to program the NAND flash now.

I encounter another problem that  the NVCC_SD1 (for 14x14 package, it's the C4 pin) has ~3.18V  even it's floating. The other SDIO pins are also left floating at the same time. The factory check the soldering with X-ray but find nothing strange. Can you think of any reason of this unexpected voltage? 

raymondman_0-1624267039368.png

Many thanks!

Raymond

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raymondman
Contributor II

Hi Aldo,

The NVCC_SD problem is a stupid mistake. 

Many thanks for your support.

Regards,

Raymond

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