Hello,
In order to avoid issues, when only i.MX6UL is reset, but external devices, such as PMIC, eMMC, DRAM
are not (say, DRAM may be if self-refresh mode and skip memory initialization ; PMIC can provide non-proper
for start up voltages) - it is highly recommended to perform total system (power on) reset. This is implemented
via WDOG signal of the i.MX6UL and some external schematic (U708, UM805).
WDOG signal may be issued directly in software ; please refer to description of Watchdog Control Register
(WDOGx_WCR), bit SRS in the Reference Manual. To form pulse from level oriented WDOG signal CR
differentiating circuit on C738, R755 is applied. D705 rejects possible voltage pulses after the CR circuit.
Have a great day,
Yuri
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