Timing violation of i.MXUL SPI communication

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Timing violation of i.MXUL SPI communication

564 次查看
surendrajadhav
Contributor IV

Hi,

We have connected SPI-UART chip on SPI interface of i.MX6UL, which can work up to 26MHz.

However its working fine till 10MHz and after this frequency we are not able to communicate with SPI-UART chip.

Though the waveform quality is not much degraded, we feel that its issue related to set up and hold time violation. Please confirm.

SPI-UART chip has MOSI hold time is min 3ns and MOSI setup time is min 5ns.

Do we have provision in iMX6UL with which we can match these timings to avoid the timing violation. Do we have programmable setup and hold time in i.MX6UL.+

Regards,

Surendra

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479 次查看
igorpadykov
NXP Employee
NXP Employee

Hi Surendra

for setup/hold times one can look at CS8,9 timimng in Figure 35. ECSPI Master
Mode Timing Diagram i.MX6UL Datasheet, they are not configurable.
http://www.nxp.com/docs/en/data-sheet/IMX6ULCEC.pdf

Best regards
igor
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