Reset i.MX6Q without resetting PF0100

norishinozaki · ‎04-05-2016

Hello Champs,

I'd like to reset i.MX6Q without resetting PF0100 and implemented the design.

However when only i.MX6Q is reset, we got lower VDDARM_IN output(about 960mV) from PF0100.

I guess thanks to DVFS, i.MX6Q can operate in lower frequency and lower voltage.

When i.MX6Q is reset in such situations, PF0100 continues to provide the lower voltage even though i.MX6Q needs more voltage in reset. Is this correct understanding?

I found reset(SW2) is directly connected to PMIC in the current SabreSD design.

I also found the following design in the old SabreSD schematics.

From the NOTE, there seems to have been troubles resetting i.MX6Q without getting reset de-asserted from the PMIC.

What's the issue?

Is it possible to create a design that only resets i.MX6Q but resets PF0100?

Best regards,

Nori Shinozaki

BiyongSUN · ‎06-02-2016

If you use the ldo enable mode, you can reset i.MX6 alone safely, with AND without DVFS.

Because ldo enable mode is using the internal PMU, so the PMIC that time like a discrete power supply.

The i.MX6 is using the PMU to change the voltage. Not any change to PMIC.

The input on VDDARM_IN and VDD_SOC_IN is fixed not dynamic like a discrete power supply.

If you ldo bypass mode, the internal PMU is not working. It is bypass.

So the i.MX6 has to use the i2c to control the pmic the change the voltage.

The input on VDDARM_IN and VDDSOC_IN is dynamic.

If that time, the voltage is changed to like power save mode, and the i.MX6 is bootup at configuration 800M.

It may cause the problem. Of course, the reason is not that simple, maybe other peripherals will also effect the reboot.

BiyongSUN · ‎06-02-2016

Suggest you use the ldo enable mode and you can keep the dvfs enable.

When you use ldo enable mode, the dfvs is working with internal pmu. You can still use that feature.

Using internal pmu(ldo enable mode) is very close to using dicrete power supply.

In ldo bypass mode, the dvfs is using i2c to control the pmic to adjust the voltage.

In some situation, during the adjusting the voltage, the reset is happenning.

norishinozaki · ‎06-02-2016

Hello Biyong,

I see!

As long as we use LDO Enable mode, we can reset i.MX6 alone safely, with or without DVFS.

Besides, we can avoid I2C failure on rest!

Thanks & BR,

N.S.

BiyongSUN · ‎06-01-2016

If you use the wdog1, it will reset i.MX6 without reset PMIC.

You can refer to the following link.

WDG_B must connect to system reset(POR_B reset) ?

norishinozaki · ‎06-01-2016

Hello Biyong,

Now I understood all I need to change is:

# Disable DVFS

operating-points =<...>;

fsl,soc-operating-points = <...>;

# Reset without reset PMIC

fsl,ldo-bypasst = <1>;

fsl,wdog-reset = <1>;

Thanks & BR,

N.S

Yuri · ‎04-07-2016

Hello,

I agree with Your approach.

Regards,

Yuri.

norishinozaki · ‎04-07-2016

Thanks,

We will try.

Best regards,

NS

Yuri · ‎04-05-2016

Hello,

generally You idea, that PMIC voltage can stay in recent state because

of DVFS is quite reasonable. IMX6 after reset cannot change PMIC voltages

itself, if recent PMIC voltages are not proper for power up. To check it, please

try any bare metal test code, which does not influence on PMIC voltages.

Under Linux - it makes sense to disable DVFS for Your PMIC configuration.

Have a great day,
Yuri

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norishinozaki · ‎04-06-2016

Thanks Yuri,

I looked for PlatformSDK but I couldn't find relevant sources.

Then I looked for unit_tests/imx-test and found a file FSL-UT-PM-006.txt which says:

| Test Procedure |

.To Enable DVFS:

echo 1 > /sys/devices/platform/imx_dvfscore.0/enable

.To Disable DVFS:

echo 0 > /sys/devices/platform/imx_dvfscore.0/enable

However I couldn't find the imx_dvfscore.0 directory in the latest Yocto BSP(3.14.52) filesystem

Then I looked for a clue in the BSP sources and found out a kernel config CONFIG_PM_DEVFREQ.

Can we disable DVFS just by setting CONFIG_PM_DEVFREQ=n in kernel configs?

Because I found Vivante GPU, MMDC, USB and etc also have registers themselvs to enable or disable DVFS.

P.S. Please try to find why they change SabreSD design how to reset.

Best regards,

Nori Shinozaki

Yuri · ‎04-07-2016

The following may help regarding DVFS : i.MX6 :: Disabling DVFS in kernel configuration

~Yuri.

norishinozaki · ‎05-31-2016

Hello Yuri,

The URL is for NXP personnel only.

Now disabling DVFS equals to fix cpu frequency by cpufreq written in Linux RM below?

Chapter 24

CPU Frequency Scaling (CPUFREQ) Driver

BR,

N.S

Yuri · ‎05-31-2016

Hello,

I have sent the information under case 00078289.

Regards,

Yuri.

norishinozaki · ‎05-31-2016

Hello Yuri,

Very thanks!

After reading the thread, I found your suggestion is the simple & best

solution.

My customer likes to reset i.MX6 only(no PF0100) in LDO Bypass fixed at

792MHz@1.275V

In that case, they just need to set as follows, correct?

imx6q.dtsi

operating-points = <

/* kHz uV */

792000 1275000

>;

fsl,soc-operating-points = <

/* ARM kHz SOC-PU uV */

792000 1275000

BTW, do they also need to disable MMDC auto self-refresh as written in

this thread?

https://community.nxp.com/thread/307212

Best regards,

Nori Shinozaki

2016-06-01 14:06 GMT+09:00 Yuri <admin@community.freescale.com>:

<https://community.nxp.com/>
Reset i.MX6Q without resetting PF0100
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<https://community.nxp.com/people/Yuri?et=watches.email.thread> in *i.MX
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<https://community.nxp.com/message/656328?et=watches.email.thread#comment-656328>

Yuri · ‎06-01-2016

As for configuring operating points in device tree file - I think it would be better

to preserve original number of working points, but just let they are the same.

Memory auto-refresh may be needed only if it is needed to preserve previous

content, without memory initialization.

Regards,

Yuri.

norishinozaki · ‎06-01-2016

Hello Yuri,

Like this?

operating-points = <

/* kHz uV */

792000 1275000

>;

fsl,soc-operating-points = <

/* ARM kHz SOC-PU uV */

792000 1275000

>;

BR,

N.S

Yuri · ‎06-06-2016

Yes.

Regards,

Yuri.

norishinozaki · ‎04-07-2016

Hello Yuri,

Besides disabling DVFS, three possible solutions came up to my mind for how to reset i.MX6Q only.

1. Fix the frequency in cqufreq

2. Use internal LDO and let PMU controls DVFS

3. Use Warm reset or Watchdog reset in i.MX6Q

What do you think?

Best regards,

Nori Shinozaki

Reset i.MX6Q without resetting PF0100

Reset i.MX6Q without resetting PF0100

i.MX6Quad

PMIC