I have custom board of iMX6q working fine with L3.14.28 , need to update kernel to BSP L4.1.15 but im facing issue with boot up.
its hangs after following:
Uncompressing Linux... done, booting the kernel.
CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c53c7d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 4.1.15-1.0.0 (xxxxxxx-VirtualBox) (gcc version 4.7.2 (GCC) ) #40 SMP PREEMPT Thu Apr 27 18:01:35 IST 2017
[ 0.000000] Machine model: XXXXX i.MX6 Quad Board
[ 0.000000] bootconsole [earlycon0] enabled
[ 0.000000] Reserved memory: created CMA memory pool at 0x1c000000, size 320 MiB
[ 0.000000] Reserved memory: initialized node linux,cma, compatible id shared-dma-pool
[ 0.000000] Memory policy: Data cache writealloc
[ 0.000000] PERCPU: Embedded 9 pages/cpu @8bb17000 s15872 r0 d20992 u36864
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 130048
[ 0.000000] Kernel command line: maxcpus=4 console=ttymxc0,115200 caam noinitrd video=vfb:0 cma=320M earlyprintk root=/dev/mmcblk0p1 ext3 rw rootwait fpga=1 3
[ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
[ 0.000000] Memory: 184696K/524288K available (4720K kernel code, 200K rwdata, 752K rodata, 268K init, 484K bss, 11912K reserved, 327680K cma-reserved)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
[ 0.000000] vmalloc : 0xa0800000 - 0xff000000 (1512 MB)
[ 0.000000] lowmem : 0x80000000 - 0xa0000000 ( 512 MB)
[ 0.000000] .text : 0x80008000 - 0x80560428 (5474 kB)
[ 0.000000] .init : 0x80561000 - 0x805a4000 ( 268 kB)
[ 0.000000] .data : 0x805a4000 - 0x805d60c0 ( 201 kB)
[ 0.000000] .bss : 0x805d9000 - 0x80652014 ( 485 kB)
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[ 0.000000] Preemptible hierarchical RCU implementation.
[ 0.000000] Additional per-CPU info printed with stalls.
[ 0.000000] RCU kthread priority: 1.
[ 0.000000] NR_IRQS:16 nr_irqs:16 16
[ 0.000000] L2C-310 erratum 769419 enabled
[ 0.000000] L2C-310 enabling early BRESP for Cortex-A9
[ 0.000000] L2C-310 full line of zeros enabled for Cortex-A9
[ 0.000000] L2C-310 ID prefetch enabled, offset 16 lines
[ 0.000000] L2C-310 dynamic clock gating enabled, standby mode enabled
[ 0.000000] L2C-310 cache controller enabled, 16 ways, 1024 kB
[ 0.000000] L2C-310: CACHE_ID 0x410000c7, AUX_CTRL 0x76070001
Hangs.....
Also NOTE: i use same kernel build and load it in SABRESD board and it work.
Help me, i don't know much about debugging kernel
PS: i saw some post in which if i comment disable_anatop_clocks(); function in "linux_4.1.15/arch/arm/mach-imx/clk-imx6q.c" it will pass and it goes further but it wont able to read partition table from SD card.
i think bcoz i disable that function is related to parent_clock. please help.
Thanks in advance.
To edit uboot the following guide will be useful as reference:
https://community.nxp.com/docs/DOC-328200
Regards,
Carlos
Hi Vatsal
image built for Sabre board may not work on custom board, due
to layout/ddr configs differencies. Please run ddr test
https://community.freescale.com/docs/DOC-105652
find new calibration coefficients and put them in uboot/..mx6sabresd/*.cfg file
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/?h=imx_v2015.04_4.1.15_1.0.0_ga
rebuild from scratch image, do not use files from L3.14.28
use linux documentation
Best regards
igor
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Hi Igor,
Thank you for reply, but i updated my DDR values in my bootloader ( we have custom boot-loader ) but still facing same issue.
I tried U-boot in my board but nothing appears, if i use SPL configuration then it display
Trying to boot from MMC1
spl: mmc partition switch failed
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
I did following changes in U-boot:
1. Updated DDR values.
2. change IOMUX for UART and MMC in board/../mxsabresd.c
i dont understand why its not able to read partition table at all.
NOTE: In My board we have used only one data pin for MMC, will it affect ? i.e., we using 3 pins: SD3_CLK , SD3_CMD, SD3_DATA0.
Hi Vatsal
it should work also with only one data pin for MMC, please check in dts file:
&usdhc {
bus-width = <1>;
Best regards
igor
Hi igorpadykov,
if i bypass disable_anatop_clocks() by comment then it pass further and hangs at:
[ 1.120655] sdhci: Secure Digital Host Controller Interface driver
[ 1.126851] sdhci: Copyright(c) Pierre Ossman
[ 1.131249] sdhci-pltfm: SDHCI platform and OF driver helper
[ 1.137873] /soc/aips-bus@02100000/usdhc@02198000: voltage-ranges unspecified
[ 1.145048] sdhci-esdhc-imx 2198000.usdhc: could not get ultra high speed state, work on normal mode
[ 1.154680] sdhci-esdhc-imx 2198000.usdhc: No vqmmc regulator found
[ 1.219316] mmc0: SDHCI controller on 2198000.usdhc [2198000.usdhc] using ADMA
[ 1.219443] mmc0: mmc_rescan_try_freq: trying to init card at 400000 Hz
[ 1.238562] mxc_vpu 2040000.vpu_fsl: VPU initialized
[ 1.259704] Galcore version 5.0.11.41671
[ 1.289091] mmc0: host does not support reading read-only switch, assuming write-enable
[ 1.308344] mmc0: new high speed SDHC card at address aaaa
[ 1.314829] mmcblk0: mmc0:aaaa SS08G 7.40 GiB
-----hangs----- after 60 sec watch dog timer restart system.
i check on sabresd board, after mmcblk0: mmc0:aaaa SS08G 7.40 GiB it will check for partition table. but in my case its not able to read. and hangs.
i have attached config file. help me is if i miss out anything.