MMC initialization issue with imx6q

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MMC initialization issue with imx6q

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sanketparekh
Contributor II

Hi,

I am working on our iMX6Q based custom board, which has DDR3L and eMMC5.0 on our board.

We have successfully initialized DDR3 memory and we are getting U-boot prompt on UART console, but not able to pass the register verification.

See the U-boot log below:

---------------------------------------------------------------

U-Boot 2016.03 (Jan 23 2018 - 18:32:46 +0530)

CPU:   Freescale i.MX6Q rev1.5 at 792 MHz
Reset cause: POR
Board: Nitrogen6X
I2C:   ready
DRAM:  512 MiB
MMC:   FSL_SDHC: 0

-----------------------------------------------------------------

What can be the cause for this?

Regards,

Sanket.

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igorpadykov
NXP Employee
NXP Employee

Hi Sanket

probably ddr memory is not working properly, please try ddr test

i.MX6/7 DDR Stress Test Tool V2.70 

Best regards
igor
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sanketparekh
Contributor II

Hi igor,

I have test DDR stress test, and it is working fine.

Best Regards,

Sanket

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igorpadykov
NXP Employee
NXP Employee

Hi Sanket

pelase verify that correct uboot ("u-boot-imx" for Nitrogen6X board) was used :

GitHub - boundarydevices/u-boot-imx6: U-Boot branch to support the Freescale i.MX6 processor 

also issue may be posted on uboot mail list

U-Boot Info Page 

Best regards
igor

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sanketparekh
Contributor II

Hi Igor,

I have tested same u-boot binary with multiple custom boards.

It is working fine, but it is not working in one board.

That we are discussed above.

Best regards

Sanket

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igorpadykov
NXP Employee
NXP Employee

Hi Sanket

if this is board issue please recheck hardware using

i.MX6 System Development User’s Guide

https://www.nxp.com/docs/en/user-guide/IMX6DQ6SDLHDG.pdf

and verify peripherals with baremetal Github SDK
https://github.com/backenklee/swp-report/tree/master/iMX6_Platform_SDK

Best regards
igor

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sanketparekh
Contributor II

Hi Igor,

I have add the prints for check the various commands will share between processor and mmc.

I got below logs.

MMC will send only one command to processor.

Is it correct sequence for send the commands?

U-Boot 2016.03 (Jan 24 2018 - 17:09:41 +0530)

CPU:   Freescale i.MX6Q rev1.5 at 792 MHz
Reset cause: POR
Board: Nitrogen6X
I2C:   ready
DRAM:  512 MiB
MMC:   FSL_SDHC: 0

cmd->cmdidx = 0 cmd->resp_type=0 cmd->cmdarg=0 cmd->response = 791899568

Best Regards

Sanket

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igorpadykov
NXP Employee
NXP Employee

Hi Sanket

mmc initialization can be checked with emmc specification:
https://www.jedec.org/sites/default/files/docs/JESD84-A441.pdf

Best regards
igor

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