MIPI display support.

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

MIPI display support.

Jump to solution
7,797 Views
MaxChou
Contributor III

Hi  Sirs

Does current BSP support to FHD at 1080(H)x1920(V) and HD at 720(H)x1280(V) ?

I found below information in i.mx6 Reference Manual,

"Programmable display resolutions, from 160x120(QQVGA) to 1024x768(XVGA)."

so the max resolution support is XGA?/

I should connect MIPI panel thru MIPI_DSI or MIPI_HSI interface ?

untitled.JPG

Sincerely, Max

Labels (2)
0 Kudos
1 Solution
2,288 Views
Yanfei_Sun
Contributor IV

Hi Max,

You should connect your panel to MIPI DSI.

and the MIPI DSI has some limitations:

1. Bandwidth. total 2Gbps with two lanes.

2. Line buffer inside the DSI. total 1024 * 4 bytes.

With the above limitation it shows that HD720P should be possible, but not HD1080P.

examples, suppose the refresh rate is 60Hz, data format is RGB565(16bpp).

for line buffer we can support 2048 pixels(in 16 bpp).

then the total bandwidth for 1080P is 1920*1080*16bpp*60Hz = 1.898Gbps. it's very marginal. and we should keep ~20% margin for sync, blanking and commands.

so it's not possible to support 1080P.

This is not validated any way, just for your reference.

Regards,

Ray

View solution in original post

0 Kudos
5 Replies
2,289 Views
Yanfei_Sun
Contributor IV

Hi Max,

You should connect your panel to MIPI DSI.

and the MIPI DSI has some limitations:

1. Bandwidth. total 2Gbps with two lanes.

2. Line buffer inside the DSI. total 1024 * 4 bytes.

With the above limitation it shows that HD720P should be possible, but not HD1080P.

examples, suppose the refresh rate is 60Hz, data format is RGB565(16bpp).

for line buffer we can support 2048 pixels(in 16 bpp).

then the total bandwidth for 1080P is 1920*1080*16bpp*60Hz = 1.898Gbps. it's very marginal. and we should keep ~20% margin for sync, blanking and commands.

so it's not possible to support 1080P.

This is not validated any way, just for your reference.

Regards,

Ray

0 Kudos
2,288 Views
juliocruz
Contributor III

Dear Yanfei,

I'm trying to use a MIPI-DSI panel to a iMX6Q custom board.

First and following suggestions from other users, I'm trying to config the timing using the file mxcfb_hx8369_wvga.c and mipi_dsi drivers.

For now, I can communicate with the panel controller in the "setup" functions (LP mode). For example, I can get the status and config other registers.

However, the display don't show anything (HS mode).

According with the panel controller, the clock period in HS mode must be greater than 4ns however in the scope I get 3ns. So, I think this could be the problem. To change this clock using the mipi_dsi driver, I change the variable "max_phy_clk", however, after this change, the LP clock is also changed and I cannot setup the panel register (in LP mode).

Do you have any suggestions? For example, can I change the HS and LP clock independently?

Also, can I download the register description of the iMX to understand the mipi_dsi driver and setup the register accordingly with this display?

Thanks,

JC

0 Kudos
2,288 Views
MaxChou
Contributor III

Hi Ray

Thanks for your explanation.

Best Regards,

Max Chou 周宏家

WT MICROELECTRONICS Co., Ltd.

4F. No. 738 ChungCheng Rd. Chung Ho, Taipei, 235 Taiwan

Tel:886-2-8226-9088#8569

Fax:886-2-8226-9099

0 Kudos
2,288 Views
alisonchaiken_m
Contributor III

Max, please share what kind of MIPI display you are using.   We have had difficulty locating MIPI displays and cameras.

Thanks,

Alison Chaiken

alison_chaiken@mentor.com

0 Kudos
2,288 Views
rotechen
Contributor I

Hello Max,

Could you share what kind of MIPI display you are using please. I have had difficulty locating MIPI display.

Thanks,

Rote Chen

rote@cenec.com.tw

0 Kudos