LVDS clock on i.MX53

[samarthmehta]

Hi, all,

I need a frequency of 33.26 MHz for the LVDS clock signal, but I am getting 66 MHz.

I have added the following mode to the ldb_modedb[] array in /drivers/video/mxc/ldb.c and mx53_evk.c:

{

     "SVGA", 60, 800, 480, 30066,

     128,128,

     23, 22,

     0, 0,

     FB_SYNC_CLK_LAT_FALL,

     FB_VMODE_NONINTERLACED,

     0

,},

My LCD is working, but display is stretched out unless I use pixel clock as 17250 instead of 30066.  Regardless of what pixel clock value I use, I get 66 MHz on LVDS clock line, which is out of spec for LCD and it puts noise on our boards. 

I am using i.MX53 and freescale version of Linux kernel 2.6.35.

Can you please guide me where I need to change clock frequencies to achieve 33.26 MHz?

Thanks

[igorpadykov]

Hi Samarth

had you passed correct kernel parameter, examples can be found in

MX53UG 18.3.1 Setting the Video Kernel Parameter and in Table 5-1

i.MX53_START_Linux_BSP_Release_Note.pdf in IMX53_1109_LINUXDOCS_BUNDLE    

Best regards

igor

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[samarthmehta]

Hi igor,

My kernel parameters are below:

bootargs_base=setenv bootargs console=ttymxc4,115200 video=mxcdi1fb:RGB666,SVGA di1_primary ldb=separate,di=0,di=1,ch0_map=SPWG,ch1_map=SPWG consoleblank=0

They seem right to the best of my knowledge.  I think the problem is the way PLL is getting set.  I am not sure where to change it.  It must be either in ldb.c or clock.c.   I will look deeper into it.  Someone has a same problem on i.MX6 and they changed the clk-imx6q.c.  We don't have this file on linux-2.6.35 and we use i.mx53, so it makes sense that it is absent.  See LVDS pixel clock on i.MX6 for more details.

[samarthmehta · Accepted solution]

I changed

unsigned long ldb_clk_prate = 455000000;

to

unsigned long ldb_clk_prate = 229292424;

in ldb.c

This brought 66 MHz clock to 33.1 MHz.