Is i.MX6 eCSPI SS_CTL = 0b in slave mode supported?

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Is i.MX6 eCSPI SS_CTL = 0b in slave mode supported?

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748 次查看
satoshishimoda
Senior Contributor I

Hi community,

I have a question about i.MX6DQ eCSPI.

Please see chapter 21.4.4.2 and chapter 21.7.3 BUST_LENGTH description in IMX6DQRM (Rev.3), these describe eCSPI behavior when SS_CTL is cleared in slave mode.

On the other hand, chapter 21.4.2 says "Slave mode only supports the case when SSCTL (SSB_CTRL[x] bit) is cleared.", and chapter 21.7.4 SS_CTL description says SS_CTL=0 is reserved in slave mode.

Which is correct?

Is SS_CTL=0b in slave mode supported? or not supported?

Best Regards,

Satoshi Shimoda

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588 次查看
Yuri
NXP Employee
NXP Employee

Hello,

  Really the problem is, that  slave mode with unspecified burst length cannot be supported. The burst length

should always be specified with the BURST_LENGTH parameter and the SS_CTL[x] should be set to zero.


Have a great day,
Yuri

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589 次查看
Yuri
NXP Employee
NXP Employee

Hello,

  Really the problem is, that  slave mode with unspecified burst length cannot be supported. The burst length

should always be specified with the BURST_LENGTH parameter and the SS_CTL[x] should be set to zero.


Have a great day,
Yuri

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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