Interrupt Vector Table in IMX6Q

[ajmalali]

Hi,
I am using I.MX6Q Sabre sd board. I am trying to build custom image with my own start script and ld script. The image is to be loaded with u-boot. Where should i place the Interrupt vector table? Now, when i reffered the "1.1.0_iMX6_Platform_SDK", The vector table was given as,
vectors:
ldr pc, .Lreset_addr
ldr pc, .Lundefined_addr
ldr pc, .Lswi_addr
ldr pc, .Lprefetch_abort_addr
ldr pc, .Ldata_abort_addr
ldr pc, .Lreserved_addr
ldr pc, .Lirq_addr
ldr pc, .Lfiq_addr
.word 0

and is loaded at "ORIGIN(OCRAM) + LENGTH(OCRAM) - 72", ie at 0x0093ffb8, as,

.ram_vectors (ORIGIN(OCRAM) + LENGTH(OCRAM) - RAM_VECTORS_SIZE) (NOLOAD) :
{
__ram_vectors_start = .;
. += RAM_VECTORS_SIZE;
__ram_vectors_end = .;
} > OCRAM

and later copied to RAM in start as,

ldr r1,=__ram_vectors_start
ldr r2,=__ram_vectors_end
ldr r3,=vectors
1: cmp r1,r2
ldmlt r3!,{r4,r5,r6}
stmlt r1!,{r4,r5,r6}
blt 1b

I am using same approach. But when i enable uart interrupt, it does not enter the ISR. Is there any problem with this approach? Or should i load the vector table at 0x00000000 in ROM ???

[ajmalali · Accepted solution]

Hi,

I found the problem. It wasn't in the UART initialization. I forgot to set the VBAR register(vector base address register), whose reset value is 0x00000000. I had linked my vector table at 0x0093ff80. After correctly setting the VBAR register, the UART interrupt is working fine with the above initializations. This is how i set VBAR,

   ldr r6,=__ram_vectors_start

   MCR p15,0,r6,c12,c0,0

   MCR p15,0,r6,c12,c0,1

[igorpadykov]

Hi Ajmal

one can check sdk interrupt example on

https://community.nxp.com/message/405135?commentID=405135#comment-405135 

Best regards
igor
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[ajmalali]

Hi Igor,

Thank you for your reply.

I have done the same sequence as explained in the thread above. What i really wanted to know was how i can configure the vector table and where to load it. Currently i have loaded it to the location  "0x0093ffb8", and have enabled the uart interrupt. But, it does not enter the ISR. 

Please suggest the possible reasons for this issue. Also please tell the necessary procedures we have to do.

Regards,

Ajmal

Note: I am using GNU(arm-none-eabi- ) Assembler

[igorpadykov]

Hi Ajmal

had you looked at function setup_interrupts_in_RAM() in

interrupt.c

~igor

[ajmalali]

Hi igor,

I tried loading the vector table using the above method, still it does not enter the ISR. I have initialized the uart as this,

void UART1_init(void)
{
int tmp;

//*********** UART1 IOMUX****************//
* R32 (IOMUXC_BASE_ADDR+0x280) = 0x00000003;     // ALT3 CSI0_DAT10 TxD
* R32 (IOMUXC_BASE_ADDR+0x284) = 0x00000003;     // ALT3 CSI0_DAT11 RxD
* R32 (IOMUXC_BASE_ADDR+0x920) = 0x00000001;     //UART1_UART_RX_DATA_SELECT_INPUT

tmp=(* R32 (CCM_BASE_ADDR+0x24)) & 0x0000003F ; //CSCDR1 uart_podf div by 1
* R32 (CCM_BASE_ADDR+0x24) = tmp;                           // UART refclk = 80MHz

// Enable UART1
// enable uart1, ignore RTS, wordsize 8bits, 1 stop bit, no parity
*(unsigned int*)(UART1_UCR2_1) = 0x01;      // reset UART state machines
*(unsigned int*)(UART1_UCR2_1) = 0x2006;  // UCR2 = CTSC,TXEN,RXEN=1,reset
*(unsigned int*)(UART1_UCR1_1) = 0x0001;  // UARTEN = 1,enable the clock
*(unsigned int*)(UART1_UCR2_1) |= IGNORE_RTS<<14; // configure IRTS bit
*(unsigned int*)(UART1_UCR2_1) |= WORD8<<5;
*(unsigned int*)(UART1_UCR2_1) |= STOP1<<6;
*(unsigned int*)(UART1_UCR3_1) |= 0x00000004; // set RXD_MUX_SEL bit
*(unsigned int*)(UART1_UCR1_1) |= 0x0201; // recieve ready interput enable

// disable parity
*(unsigned int*)(UART1_UCR2_1) &= ~(0x00000100);

//SetRFDIV_to_div_by_1_UART1();
tmp = *(unsigned int*)(UART1_UFCR_1); // save UFCR to default value
*(unsigned int*)(UART1_UFCR_1) = 5<<7; // set RFDIV to div-by-1 or b101
*(unsigned int*)(UART1_UFCR_1) |= tmp; // set other UFCR bits back to default

*(unsigned int*)(UART1_UBIR_1) = 0x4;
*(unsigned int*)(UART1_UBMR_1) = 0xD8;

*(unsigned int*)(UART1_UCR3_1) |= 0x00000040; 
*(unsigned int*)(UART1_UCR4_1) |= 0x00000081; 

/* RxTl =1 */

tmp = *(unsigned int*)(UART1_UFCR_1);
tmp = tmp & 0xffffffc0;
tmp = tmp | 0x00000001;
*(unsigned int*)(UART1_UFCR_1) = tmp;

/* Rf div */
tmp = *(unsigned int*)(UART1_UCR1_1);
tmp = tmp & 0xfffffcff;
tmp = tmp | 0x00000200;
*(unsigned int*)(UART1_UCR1_1) = tmp;

}

Am i missing some initialization steps for uart receive interrupt?