We are using i.MX 8M Mini (imx8mm) on a SOM module. The module includes an onboard SN65DSI84 LVDS bridge. The bridge works with a particular display (single link LVDS 800x480), but we need to interface it with a dual-link LVDS 1920x1200 panel. I have adjusted the dts files to enable dual-link mode and the proper panel configuration, but I get no output on the target display. I do see some data at least on both LVDS lanes. I have attached relevant code snippets from the DTS files for reference. One thing I found is that if the pixel clock is set above 150 MHz (the recommended pixel clock is 77.56 MHZ * 2 = 155.12 MHz), the framebuffer device does not appear at all in /dev/fb0 or /sys/class/graphics, so I am using the minimum panel timings for now.
Looking at the TI forums, there is a lot of talk about needing to set the DSI clock so the LVDS bridge can derive the LVDS pixel clock. However, I see little to no information on how to do this on the imx8mm and no clues from the dts bindings documentation.
Is it necessary to manually (through dts or driver source code modification) adjust the DSI clock to meet the requirements of the LVDS panel? Or, is the DSI clocks handled automatically based on the panel timings?
As a side note, I also tried to double the horizontal timings for the 800x480 display and hook it up to just 1 LVDS port. I expected to see only odd or even pixels, but the display does not show correctly (looks like vertical stripes). I really think there is something missing in the DSI/LVDS configuration but it seems there is not enough clear guidance on what I could be missing.
The DSI shenanigans on this CPU are really a big problem. We have had no luck getting any displays working with this CPU other than pre-provided kits. We have been trying to get the required displays working for months with no forward progress.
Lastly, I am working with Yocto 6.1 Mickledore release.
