Based a design off of the reference board. We used the reference design power switch circuit to get us the two events. One is a button connected straight to VDDXTAL, the other is to the a 3.3V supply through a 10k resistor. We found an edge case where both events can occur and over drive VDDXTAL sometimes causing a reset. Yellow is the PSWITCH, pink is the VDDXTAL:
Now hindsight, I should have had a diode in place to block the 3.3V to the VDDXTAL. What I would like to know is where is the reset occuring? I have not been able to find it in the documentation where this reset is caused.
Thanks,
Derek
Solved! Go to Solution.
Since VDDXTAL supplies power to the main clock source oscillator, its overvoltage/undervoltage may break a stable clock generation, therefore, causing the reset to the whole system.
Since VDDXTAL supplies power to the main clock source oscillator, its overvoltage/undervoltage may break a stable clock generation, therefore, causing the reset to the whole system.