dear freescal:
I want to verify my pcie bus, but I don't know how to connect two board.
dear sir:
I have readed this link https://community.freescale.com/docs/DOC-95014
fsl's link description as blow:
Connected by 2*mini_PCIe to standard_PCIe adaptors, 2*PEX cable adaptors, and one PCIe cable.
my question is:
1,"mini_PCIe to standard_PCIe adaptors" is what? where can I got it?
2,"PEX cable adaptors" is what? where can I got it?
HI mingmin
you should by these two cards
PM2C V2.1 (PCI-E / Mini PCI-E adapter)
then manually solder sata cable between them
please read carefully 'How to make it"
i.MX6Q PCIe EP/RC Validation System
Best regards
igor
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dear sir:
I have build image and flash image to EP board and RC board.
when system boot, I also look the log as below, so I think pcie link is OK.
but when I test send and receive data, result is fail. can you help me?
my test cmd:
EP side:
root@freescale /unit_tests$ ./memtool -32 01000000=deadbeaf
Writing 32-bit value 0xDEADBEAF to address 0x01000000
RC side:
root@freescale /unit_tests$ ./memtool -32 40000000 10
E
Reading 0x10 count starting at address 0x40000000
0x40000000: DFFBFF4B DFFE3E75 7FF8FBFF 7FDBFEDD
0x40000010: FEDA7DFA 7FFF58FF FF2DFEDA 5FDD3CFD
0x40000020: F9F0FCBF 7FADADE7 EFF7FDEC FF797FED
0x40000030: FDF3FFFD 7E8DEDEF FB077D2D BFFDF8FD
boot log:
iMX6 PCIe PCIe RC mode imx_pcie_pltfm_probe entering.
PCIE: imx_pcie_pltfm_probe start link up.
IMX PCIe port: link up.
PCI: bus0: Fast back to back transfers disabled
PCI: bus1: Fast back to back transfers enabled
pci 0000:00:00.0: BAR 0: assigned [mem 0x01000000-0x010fffff 64bit pref]
pci 0000:00:00.0: BAR 0: set to [mem 0x01000000-0x010fffff 64bit pref] (PCI address [0x1000000-0x10fffff])
pci 0000:00:00.0: BAR 6: assigned [mem 0x01100000-0x0110ffff pref]
pci 0000:00:00.0: PCI bridge to [bus 01-01]
pci 0000:00:00.0: bridge window [io disabled]
pci 0000:00:00.0: bridge window [mem disabled]
pci 0000:00:00.0: bridge window [mem pref disabled]
PCI: enabling device 0000:00:00.0 (0000 -> 0003)