How to use CSPI2_SS2 and CSPI2_SS3 on imx6q

[peterhafner]

I need to use on the SPI2 4 chipselect!

How can I calculate the Hex-val after the GPIO's ?

Why is here the GPIO definition used ?

I can thought, that I can remember, there was a problem with using native-pin defines for CS ?

This is the pingrp, defined in dts.

Any hints ?

Special how to calculate the hex-values.....

pinctrl_ecspi2: ecspi2grp {
fsl,pins = <
MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x1b0b1
MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x1b0b1
MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x1b0b1
MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x000f0b0 /* CSPI2_CS0, SPI_SS0 */
MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000f0b0 /* CSPI2_CS1, SPI_SS1 */MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x000f0b0 /* CSPI2_CS2, SPI_SS1 */
MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x000f0b0 /* CSPI2_CS3, SPI_SS1 */
>;
};

This is more or less the second part in dts-file

&ecspi2 {
fsl,spi-num-chipselects = <4>;
cs-gpios = <&gpio2 27 0>, <&gpio2 26 0>, <&gpio3 24 0>, <&gpio3 25 0>; /* CS0 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2>;
status = "okay";
};

Thanks

Peter

[igorpadykov]

Hi Peter

one can check native CS patch

[v4,1/3] spi: imx: GPIO chip select DT property should not be required - Patchwork 

"Hex-val after the GPIO's" are iomux pad settings, as for example described in

sect.36.4.259 Pad Control Register (IOMUXC_SW_PAD_CTL_PAD_EIM_LBA_B)

i.MX6DQ Reference Manual

http://www.nxp.com/docs/en/reference-manual/IMX6DQRM.pdf

Best regards
igor
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