Dear Team,
I am using Imx6ull in our design. I want to configure this pin CCM_CLK1_P to give output of 26MHZ? But when i search like CLK1_P, I can see this bit in 5 to 6 registers. I do know to which register we have to enable it.
My requirement is i need to generate 26MHZ with this pin.
Can you help me on this?
Thanks
Peru
Hi Peru
one can try to output clock CLKO1,2 using CCM_CCOSR register, described in
sect.18.6.21 CCM Clock Output Source Register (CCM_CCOSR)
i.MX 6ULL Applications Processor Reference Manual
Use divider CLKO1(2)_DIV : /8, 26MHz *8=128MHz and
generate 128MHz on some unused clock, for example "sai1_clk_root" or
spdif0_clk_root, depending on application.
Best regards
igor
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