The fido5100 and fido5200 REM switches connect to a communication processor with a host interface designed as a standard asynchronous memory bus port. The host interface is either a 16-bit or 32-bit memory bus, with the possibility to multiplex address and data, reducing pin count
In the application notes above, they show connections between fido5200 to the NXP IMX 6ULL processors via External Interface Module (EIM).
Looking at the IMX8M Reference Manual there seems to be a DDR Controller for DDR memories and a GPMI (General Purpose Media Interface) which seems to be for NAND memories. It seems like there are no controllers/interface on the IMX8M that will work with the fido5200? Can you please confirm my findings?