Hi All,
Our product with i.MX6q system sometimes fail to boot from NAND flash.
I found a similar case(ERR007117) with this error in IMX6DQ errata document.
Is it a same situation with case ERR007117?
Debug log is as below.
U-Boot 2009.08-dirty ( 7月 02 2014 - 11:48:24)
CPU: Freescale i.MX6 family TO1.2 at 792 MHz
Thermal sensor with ratio = 186
Temperature: 23 C, calibration data 0x5984fd69
mx6q pll1: 792MHz
mx6q pll2: 528MHz
mx6q pll3: 480MHz
mx6q pll8: 50MHz
ipg clock : 66000000Hz
ipg per clock : 66000000Hz
uart clock : 80000000Hz
cspi clock : 60000000Hz
ahb clock : 132000000Hz
axi clock : 264000000Hz
emi_slow clock: 29333333Hz
ddr clock : 528000000Hz
usdhc1 clock : 198000000Hz
usdhc2 clock : 198000000Hz
usdhc3 clock : 198000000Hz
usdhc4 clock : 198000000Hz
nfc clock : 11000000Hz
Board: i.MX6Q-PCP-A301: unknown-board Board: 0x63012 [POR ]
Boot Device: NAND
I2C: ready
DRAM: 1 GB
NAND: gpmi_reset_block(00112000): module reset timeout
gpmi_reset_block(00112000): module reset timeout
gpmi_reset_block(00112000): module reset timeout
gpmi_reset_block(00112000): module reset timeout
gpmi_reset_block(00112000): module reset timeout
gpmi_reset_block(00112000): module reset timeout
gpmi_reset_block(00112000): module reset timeout
gpmi_reset_block(00112000): module reset timeout
gpmi_reset_block(00112000): module reset timeout
gpmi_reset_block(00112000): module reset timeout
[send_command] DMA error
Command execute failed!
[send_command] DMA error
Command execute failed!
[read_data] DMA error
[read_data] DMA error
[send_command] DMA error
Command execute failed!
[read_data] DMA error
[read_data] DMA error
[send_command] DMA error
Command execute failed!
[read_data] DMA error
[send_command] DMA error
Command execute failed!
[read_data] DMA error
[read_data] DMA error
[read_data] DMA error
[read_data] DMA error
[read_data] DMA error
[read_data] DMA error
[read_data] DMA error
[read_data] DMA error
No NAND device found!!!
0 MiB
MMC: FSL_USDHC: 0,FSL_USDHC: 1,FSL_USDHC: 2
已解决! 转到解答。
Yes, the error is caused by ENGR007117. You need i.MX6Q silicon rev 1.3 on your board and your u-boot need to follow the procedure in this errata to work around this issue. Example code can be found at setup_gpmi_nand() in Yocto L3.10.17 u-boot-imx/2013.04-r0/git/board/freescale/mx6qsabreauto/mx6qsabreauto.c (attached).
Yes, the error is caused by ENGR007117. You need i.MX6Q silicon rev 1.3 on your board and your u-boot need to follow the procedure in this errata to work around this issue. Example code can be found at setup_gpmi_nand() in Yocto L3.10.17 u-boot-imx/2013.04-r0/git/board/freescale/mx6qsabreauto/mx6qsabreauto.c (attached).
HI peterchan;
1."You need i.MX6Q silicon rev 1.3 on your board" is what meaning?
2.my page size is 4096,the OBB is 224,is it true?
3.mu uboot2013 can Operate Nand register,so it can recognize the nand ,but the uboot can't read/write the memory.
It display :
MXS NAND: DMA read error
MXS NAND: Error sending command
1. Yes, you need i.MX6Q silicon rev 1.3 for NAND boot. All code that switch switching enfc_clk_root also needs to follow the procedure in errata.
2,3. The errata ENGR007117 does not related to NAND layout. The problem is the enfc_clk_root clock is not gated off before switching its clock source. The clock glitches might be passed to the dividers that follow and will affect the GPMI and BCH. Please double check your u-boot to ensure it is following the errata to switch enfc_clk_root.
HI peterchan:
1.I'm sorry to understand the "silicon",please explain again.
2.I reference you provide mx6qsabreauto.c, I operated the command in uboot:
MX6QSABRELITE U-Boot > nand read 10800000 10000000 400000
NAND read: device 0 offset 0x10000000, size 0x400000
but prompt:
MXS NAND: DMA read error
MXS NAND: Error sending command
3. it doesn't matter with OOB size?
please! thank you!
The errata ENGR007117 describe a NAND boot problem caused by the enfc_clk_root clock is not gated off when doing clock source switching. The function blocks GPMI and IOMUX relies on the enfc_clk_root clock as its input. When power up, ROM code switches the enfc_clk_root clock source without gated off the clock to these blocks. clock glitches might be passed to the divider that follows the clock mux, and the divider might behave unpredictably. This can cause the clock generation to fail and the chip will not boot successfully.
The software workaround is to gate off the GPMI and IOMUX blocks before switching the enfc_clk_root clock source, and gate on these blocks again after switching complete. Silicon rev 1.3 has included this workaround to fix the problem in ROM code. So you need both silicon rev 1.3 and follow the ENGR007117 workaround in u-boot and kernel. Please refer to the chip errata document for more detail information.
Are you testing on silicon rev 1.3? Do you boot the i.MX6 chip from raw NAND? Or boot from other device and test the u-boot NAND commands? Can u-boot identify this NAND part?
HI peterchan:
my board is mx6q_sabrelit ; uboot is 2013.04;so I reference you provide the mx6qsabreauto.c, I added "setup_gpmi_nand(void)" at mx6qsabrelit.c,This function gated off ENFC_CLK_ROOT clock first ,then config gpmi and bch clock,and enable ENFC_CLK_ROOT clock,This function same as you above.
my uboot boot form SPI flash;This my uboot print info:
U-Boot 2013.04 (Jan 12 2015 - 18:51:10)
CPU: Freescale i.MX6Q rev1.2 at 792 MHz
CPU: Temperature 32 C, calibration data: 0x55a4ae7d
Reset cause: POR
Board: MX6Q-Sabre Lite
I2C: ready
DRAM: 1 GiB
NAND: 256 MiB //my uboot can recognized Nand flash well.and parameters are correct!
MMC: FSL_SDHC: 0, FSL_SDHC: 1
SF: Detected SST25VF016B with page size 4 KiB, total 2 MiB
No panel detected: default to HDMI
unsupported panel HDMI
In: serial
Out: serial
Err: serial
Net: using phy at 7
FEC [PRIME]
Normal Boot
Hit any key to stop autoboot: 0
MX6QSABRELITE U-Boot > nand info
Device 0: nand0, sector size 128 KiB //my nand parameters
Page size 2048 b
OOB size 64 b
Erase size 131072 b
MX6QSABRELITE U-Boot > nand erase 0 400
NAND erase: device 0 offset 0x0, size 0x400
MXS NAND: DMA read error //the DMA error
MXS NAND: Error sending command
MXS NAND: Error sending command
1."The silicon rev 1.3 " is the mx6q or uboot ? I'm sorry to understant it,can you give me the errata document? I don't know where download it.
2.I need to set the timing? I used the default timing at the uboot.and I used the Asynchronous.
You can download the i.MX6DQ errata at http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6Q&fpsp=1&tab=Documentation_Tab. You need i.MX6Q rev 1.3 when the boot device is NAND flash.
The MXS-NAND driver in u-boot 2013.04 does not update the GPMI_TIMINGx registers. These register values are either passed from the Firmware Configuration Block when boot mode is NAND or the reset values for other boot modes.
Since i.MX6Q is not boot from NAND and the u-boot can detect the NAND device, it does not seem your device is affected by ERR007117.