Enabling ecspi1 on imx8mm isn't working

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

Enabling ecspi1 on imx8mm isn't working

ソリューションへジャンプ
2,154件の閲覧回数
wdunkley
Contributor III

I can currently use spidev1 (ecspi2), however, when I try to used spidev0 (ecspi1) all I get back is all 1's. 

In my  dts file /imx-yocto-bsp/wills11/tmp/work-shared/imx8mmevk/kernel-source/arch/arm64/boot/dts/imx8mm-evk.dts file I removed the uart3 stuff and added 

pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x150
MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x150
MX8MM_IOMUXC_ECSPI1_SS0_ECSPI1_SS0 0x150
MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x150
>;
};

also, can anyone explain why the uart3 hex values were 0x140 when the manual says that only bits 0,1,2,4 are available to be changed?

*&ecspi1 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
spidev@0x00 {
compatible = "spidev";
spi-max-frequency = <10000000>;
spi-cs-high;
reg = <0>;
};
};

( Here is how I got the spidev1 working if anyone needed help with that. 

pinctrl_ecspi2: ecspi2grp {
fsl,pins = <
MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x00000116
MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x00000116
MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x00001916
MX8MM_IOMUXC_ECSPI2_SS0_ECSPI2_SS0 0x00000116
>;
};

 

&ecspi2 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2>;
status = "okay";
spidev@0x00 {
compatible = "spidev";
spi-max-frequency = <10000000>;
spi-cs-high;
reg = <0>;
};
};

)

Which I believe should make spidev0 these pins. However like I said even with nothing plugged in I get all 1's

pin 10 SCLK
pin 8 MOSI
pin 11 ss0
pin 7 MISO

Does anyone have any insight into this? I've added my dts file if anyone wanted to look at it for some help on the spi bus I have working. 

ラベル(1)
0 件の賞賛
返信
1 解決策
2,107件の閲覧回数
wdunkley
Contributor III

It turns out that the problem was my chip select, I did end up changing my configuration from 0x150 to just 0x10, however in theory they should be the same. 

MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x10
MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x10
MX8MM_IOMUXC_ECSPI1_SS0_ECSPI1_SS0 0x10
MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x10

元の投稿で解決策を見る

0 件の賞賛
返信
2 返答(返信)
2,108件の閲覧回数
wdunkley
Contributor III

It turns out that the problem was my chip select, I did end up changing my configuration from 0x150 to just 0x10, however in theory they should be the same. 

MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x10
MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x10
MX8MM_IOMUXC_ECSPI1_SS0_ECSPI1_SS0 0x10
MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x10

0 件の賞賛
返信
2,141件の閲覧回数
joanxie
NXP TechSupport
NXP TechSupport
0 件の賞賛
返信