Does i.mx6solo has limitation on GPIO INTERRUPT?

[garyyin]

Our board is based on i.mx6solo, running linux 3.10.45, using atmel touch panel with an interrupt pin. If we use CSI0_DATA_EN as the interrupt pin, the touch panel driver works fine. The config is as following:

In the dts:

atmel_mxt_ts@4a {

        compatible = "atmel,atmel_mxt_ts";

        reg = <0x4a>;

        interrupt-parent = <&gpio5>;

        interrupts = <20 2>;

        work-mode = <1>;

        vdd-supply = <&reg_3p3v>;

        avdd-supply = <&reg_3p3v>;

};

...

iomux:

MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x80000000

But, if we change the interrupt pin to other gpio such as GPIO_16 as following:

atmel_mxt_ts@4a {

        compatible = "atmel,atmel_mxt_ts";

        reg = <0x4a>;

        interrupt-parent = <&gpio7>;

        interrupts = <11 2>;

        work-mode = <1>;

        vdd-supply = <&reg_3p3v>;

        avdd-supply = <&reg_3p3v>;

};

...

iomux:

MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x80000000

The touch panel driver doesn't work, as no interrupt generated, the GPIO_16 held LOW. The same problem found on GPIO_18(GPIO7_IO13).

Why?

[igorpadykov]

Hi Gary

there are no known issues with GPIO_16,18, one can check if they are

used somewhere by other modules or in uboot. Also one can try to

printf its registers for debugging purposes.

Instead ox80000000 one can try 0x1b0b1

Best regards

igor

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[garyyin]

I've checked, there is no conflict use with GPIO_16 & 18. I'll check again.

By the way, could you tell me the meaning of '0x80000000' ,'0x1b0b1' and other possible config value ? I've searched lots of device tree doc, but in vain.

[igorpadykov]

the 0x80000000 means that the kernel will not touch the PAD settings and

it will use whatever comes from default (or from U-boot in case it was

previously configured in U-boot).

[garyyin]

Thanks very much.

could you tell me the related doc or kernel-source-code which explains the values?

[igorpadykov · Accepted solution]

Devicetree – The Devicetree is a data structure for describing hardware.

Definitive GPIO guide - Studio Kousagi Wiki

A Tutorial on the Device Tree (Zynq) -- Part I | xillybus.com

[garyyin]

Thanks very much. The doc you mentioned are helpfull to me.

By the way, How to do the "Diasy chain" config int the device tree source?

For example:

GPIO17_ALT0 & NAND_CS2_B_ALT2 both map to "ESAI_TX0". Beside basic pin mux config, how to add the additional path config?