Display output clock polarity?

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Display output clock polarity?

Contributor II

Can someone at Freescale verify this documentation?

Data Sheet or Document Name:i.MX53 Multimedia Applications Processor Reference Manual
Revision #:2, 12/2011
Page #:3141
Section/Figure/Table:IPU_DI0_GENERAL field descriptions
Subject:LCD display clock polarity
Description:The reference manual says:
17 di0_polarity_disp_clk
DI0 Output Clock's polarity
This bits define the polarity of the DI0's clock.
1 The output clock is active high
0 The output clock is active low

The i.MX53xD Applications Processors for Consumer Products, Rev. 4.1 datasheet says:
IPP_DISP_CLK latches data into the panel on its negative edge (when positive polarity is selected).

However, the reference manual does not explain what is high polarity or low polarity.

Please clarify.
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