Detect DDR size in u-boot on i.mx8m

[richard_hu]

Hello, Sir:

We have a model of custom i.mx8m board but it comes with different size of LPDDR4.(1GB, 2GB and 3GB)

And we have different resistors for GPIO to identify the size of LPDDR4 on boards.

In SPL, it detects the size of LPDDR4 and applies corresponding DDR initialization code generated by i.mx8m DDR tool.

It works fine.

The problem is in "dram_init" function in u-boot:

In this function, it has to assign the actual size of DRAM to "gd->ram_size" to inform u-boot of the available ddr size.

There are three possible approaches:

1. Utilize detection GPIO to identify DDR size: it doesn't work.

It seems that "dram_init" is in the very early stage. IOMUX doesn't even take effect.

I always get error code from "gpio_get_value". (The same code works in SPL.)

2. Utilize "get_ram_size" to get ddr size: it doesn't work for 3GB size.

There is constraint for "get_ram_size".

It only works for the size that is power of 2. So it doesn't work for 3GB.

It always returns 16 if i set the argument - "maxsize" as 3GB .

3. Get DDR size from memory controller:

It lacks of useful information of DDR controller in technical reference manual of i.mx8m.

Is there API like "imx_ddr_size" of i.mx6 for i.mx8m?

Or could you provide the information how i read DDR size from DDR controller?

Thanks you~!!!

BR,

Richard

[Yuri]

Hello,

  For i.MX 8M, U-Boot use SPL to initialize the DDR. SPL contains the codes for
DDR PHY and DDR controller initialization and DDR PHY training, so users need
to modify the codes. Customers can provide here a variable, containing memory
size information for further cheking.

Regards,

Yuri.

[richard_hu]

Hello, Yuri:

Thanks for your reply.

We already have a workaround to store DDR size information in the specific memory address to pass this information to u-boot from SPL.

But i still think it's not the best solution.

There should be a way to detect DDR size from the registers of memory controller.

And i can't find detailed information of memory controller in TRM.

BR,

Richard

[jemish_1990]

Hi @richard_hu 

Here you mentioned that you have workaround to store DDR size information in the specific memory address to pass this information to u-boot from SPL.

Can you suggest me how did you calculate size of DDR that can be stored in specific memory register.

We are have same situation that we want to support 3GB and 4GB DDR but we are facing problem to get DDR size. Any suggestion would be appreciated

Thanks,

Jemish