DDR3 Swapping data lines and yocto configuration

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DDR3 Swapping data lines and yocto configuration

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juanalbertogonz
Contributor II

Hi,  

we are working with a custom board, that implemented data lines swapping,  the note says target DDR IC register read value must be transposed according to the data line swapping.

Where should I look to set this transpose value into the yocto configuration? Or how this transpose  is configured?

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jamesbone
NXP TechSupport
NXP TechSupport

There is no need for additional mapping or software reconfiguration, as

it is done automatically. Bit swapping is described in sect.3.5.1 Swapping data lines IMX6DQ6SDLHDG

 

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igorpadykov
NXP Employee
NXP Employee

Hi juanalbertogonz

 

regarding " target DDR IC register read value must be transposed according to the data line swapping." -

this is needed for reading MR registers of ddr part. For DDR3(L) memories such reading is not

used. So this may be ignored for DDR3(L).

 

Best regards
igor

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juanalbertogonz
Contributor II

Thanks for the answer

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jamesbone
NXP TechSupport
NXP TechSupport

There is no need for additional mapping or software reconfiguration, as

it is done automatically. Bit swapping is described in sect.3.5.1 Swapping data lines IMX6DQ6SDLHDG

 

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juanalbertogonz
Contributor II

Thanks for the answer

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