DDR3 Swapping data lines and yocto configuration

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

DDR3 Swapping data lines and yocto configuration

Jump to solution
855 Views
juanalbertogonz
Contributor II

Hi,  

we are working with a custom board, that implemented data lines swapping,  the note says target DDR IC register read value must be transposed according to the data line swapping.

Where should I look to set this transpose value into the yocto configuration? Or how this transpose  is configured?

0 Kudos
1 Solution
839 Views
jamesbone
NXP TechSupport
NXP TechSupport

There is no need for additional mapping or software reconfiguration, as

it is done automatically. Bit swapping is described in sect.3.5.1 Swapping data lines IMX6DQ6SDLHDG

 

View solution in original post

0 Kudos
4 Replies
832 Views
igorpadykov
NXP Employee
NXP Employee

Hi juanalbertogonz

 

regarding " target DDR IC register read value must be transposed according to the data line swapping." -

this is needed for reading MR registers of ddr part. For DDR3(L) memories such reading is not

used. So this may be ignored for DDR3(L).

 

Best regards
igor

0 Kudos
816 Views
juanalbertogonz
Contributor II

Thanks for the answer

0 Kudos
840 Views
jamesbone
NXP TechSupport
NXP TechSupport

There is no need for additional mapping or software reconfiguration, as

it is done automatically. Bit swapping is described in sect.3.5.1 Swapping data lines IMX6DQ6SDLHDG

 

0 Kudos
817 Views
juanalbertogonz
Contributor II

Thanks for the answer

0 Kudos