DDR3 Custom Board Configuration

[sayi]

Hello NXP Team,

I am trying to bring up a custom board which is using imx6 solo processor with different DDR3 SDRAM Configuration

I am trying to understand the following settings on SABRE solo board . Could you please explain

          0x21b001c = 0x04008032

          0x21b001c = 0x8033

          0x21b001c = 0x48031:

Thanks,

Says

[igorpadykov · Accepted solution]

please look at

https://community.freescale.com/docs/DOC-105652

~igor

[sayi]

Thanks Igor !! One final question before I close this topic.

- From BSP porting document for configuring DDR3 I see free-scale mentioned about changing the *.cfg file in boards/mx6solosabresd/*.cfg file but I also see Plugin.s file in the same folder that has the same DCD table as the cfg file and from make file I see we are using plugin.s object file.

For board mx6solosabresd:

Could you please clarify if we should change the DCD table in *.cfg or plugin.s it looks like plugin.s is the assembly version of the *.cfg file.

Thanks,

Swapna

[igorpadykov]

Hi Swapna

both options are equal, one can use them

on own choice.

Best regards

igor

[sayi]

Thank you Igor.

I already saw the reference manual but I am a bit confused with mode register setting.

For Ex: 0x21b001c = 0x04008032

The mode register address is 0x0400 and I couldn't figure this address from the DRAM manufacturer data sheet.

Could you please help?

[igorpadykov]

Hi Says

one can find in comments attached file:

// Mode register writes

setmem /32    0x021b001c =    0x04008032    // MMDC0_MDSCR, MR2 write, CS0

~igor

[sayi]

Thanks. This was helpful.

- Can we use JTAG to initialize memory? Are there any scripts for JTAG and recommendations from freescale to bring up a custom board based on solo.?

I am looking at the uboot code  board configuration files and they are *.cfg files with Device configuration Tables is this the only place to change the needed for custom board.

Appreciate your time!!

[igorpadykov]

Hi Says

these records performs programming DDR chips Mode registers,

description can be found in sect.45.12.8 MMDC Core Special Command

Register (MMDCx_MDSCR) i.MX6SDL Reference Manual

http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6SDLRM.pdf

and datasheets of used DDR parts.

Best regards

igor

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