Any setting of PCIe is different between i.MX6Q and i.MX6Solo?

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Any setting of PCIe is different between i.MX6Q and i.MX6Solo?

912 次查看
oliverkuo
Contributor IV

Hi,

We have a custom board with i.MX6Q/Solo.

The PCB is same and may mount i.MX6Quad or i.MX6Solo, the BSP is L3.0.35_4.1.0.

The mPCIe wifi card, Unex DNXA-116 using Atheros AR9386, works properly without issues on i.MX6Solo, but would caused system halt on i.MX6Quad.

There was no error message posted out when system halted, it was just sudden death.

3 pieces of i.MX6Quad halted on differnt point, one board could play video for awhile and then halted, another halted when executed lspci or loaded ath9k.ko and the other halted while booting, the symptom is variously.

If I defined CONFIG_IMX_PCIE_RC_MODE_IN_EP_RC_SYS, system was stable but mPCIe wifi card couldn't be detected.

So, any setting for mPCIe is different between i.MX6Q and Solo?

static int _clk_pcie_enable(struct clk *clk)
{
   unsigned int reg;

#ifndef CONFIG_IMX_PCIE_RC_MODE_IN_EP_RC_SYS
   /* Activate LVDS CLK1 (the MiniPCIe slot clock input) */
   reg = __raw_readl(ANADIG_MISC1_REG);
   reg &= ~ANATOP_LVDS_CLK1_IBEN_MASK;
   __raw_writel(reg, ANADIG_MISC1_REG);

   reg = __raw_readl(ANADIG_MISC1_REG);
   reg |= ANATOP_LVDS_CLK1_SRC_SATA;
   __raw_writel(reg, ANADIG_MISC1_REG);

   reg = __raw_readl(ANADIG_MISC1_REG);
   reg |= ANATOP_LVDS_CLK1_OBEN_MASK;
   __raw_writel(reg, ANADIG_MISC1_REG);
#endif

   /* Enable PCIE ref clock */
   reg = __raw_readl(PLL8_ENET_BASE_ADDR);
   reg |= ANADIG_PLL_ENET_EN_PCIE;
   __raw_writel(reg, PLL8_ENET_BASE_ADDR);

   _clk_enable(clk);

   return 0;

Any suggestion would be appreciated.

Best regards,

Oliver

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534 次查看
Yuri
NXP Employee
NXP Employee

Hello

  According to app note AN4397 (Common Hardware Design for i.MX 6Dual/6Quad

and i.MX 6Solo/6DualLite) basically there are no PCIe differences between i.MX6Q
and i.MX6Solo.

http://www.nxp.com/doc/AN4397 

 

 Perhaps general issues take place in the case, say because of noisy environment.

In particular, please look at EB814 “Minimum/Maximum ESR Requirement for
i.MX 6Dual/6Quad Analog Regulators”


http://www.nxp.com/assets/documents/data/en/engineering-bulletins/EB814.pdf 

 

  Also memory test may be performed.

 

https://community.nxp.com/docs/DOC-105652 

 

Have a great day,
Yuri

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