About the modification of UART1 pins used in DDR-Stress-tester for i.MX6DL

[yuuki]

Dear all,

We want to run DDR Stress Tester on the our original iMX6DL board.
However, in our board, USB_OTG is not implemented.
And, SD3_DAT6/ALT1(RX) and SD3_DAT7/ALT1(TX) are used as UART1.

DDR_Stress_Tester_V1.0.2_UART1_for_SDboot&JTAG.zip uses CSI0_DAT10/ALT3 and CSI0_DAT11/ALT3 as UART1.
It is necessary for us to modify it to use following pins of UART1.
- RX:SD3_DAT6/ALT1
- TX:SD3_DAT7/ALT1

Therefore, I got a source code of the DDR_Stress_Tester_V1.0.2.zip from FSL local FAE.

For UART1 pins, we made the following modifications.

iMX6_DDR_Stress_Tester_source\src\mx6dlのhardware.c

[Before]
#elif UART1_1
    /* UART1 TXD */
    writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT10);
    /* UART1 RXD */
    writel(ALT3, IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT11);
    // daisy chain setup
    writel(0x1, IOMUXC_UART1_IPP_UART_RXD_MUX_SELECT_INPUT);

[After]
#elif UART1_1
    /* UART1 TXD */
    writel(ALT1, IOMUXC_SW_MUX_CTL_PAD_SD3_DAT7);
    /* UART1 RXD */
    writel(ALT1, IOMUXC_SW_MUX_CTL_PAD_SD3_DAT6);
    // daisy chain setup
    writel(0x11, IOMUXC_UART1_IPP_UART_RXD_MUX_SELECT_INPUT);

DDR_Stress_Tester_V1.0.2.zip uses USB_OTG port.
It is necessary for us to switch from USBOTG to UART1.

Would you teach a modification file and the contents to change from USB_OTG to UART1?

Best Regards,
Yuuki

[igorpadykov]

Hi Yuuki

please follow recommendation on link below in case when USB_OTG is not available:

If  USB OTG port is not available on customer board, please use the images in

DDR_Stress_Tester_V1.0.3_UART1_for_SDboot&JTAG.zip.

The bin files in the packages can be loaded by uboot and elf files are used by JTAG load.

i.MX6 DDR Stress Test Tool V1.0.3

Best regards

igor

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[yuuki]

Dear Igor-san,

Thank you for your quick response.

The DDR_Stress_Tester_V1.0.3_UART1_for_SDboot&JTAG image uses CSI0_DAT10 pin and CSI0_DAT11 pin for UART1.

In customer board, UART1 is assigned SD3_DAT7 pin and SD3_DAT6 pin.
Therefore we cannot use DDR_Stress_Tester_V1.0.3_UART1_for_SDboot&JTAG.

It is necessary for us to modify a source code of DDR_Stress_Tester_V1 .0.2.

We understood the method to set pins of UART1.
However, we do not understand a method to change from USB-OTG to UART1.

Would you teach this method?

Or, would you send it to me if there is a source code of DDR_Stress_Tester_V1.0.3_UART1_for_SDboot&JTAG?

Best Regards,
Yuuki

[igorpadykov]

Hi Yuuki

there is no "method to change from USB-OTG to UART1"

since iROM uses SDP for loading image - it uses only USB OTG,

it can not be changed to UART: this is hardware limitation.

So one needs to use JTAG.

Best regards

igor

[yuuki]

Dear Igor-san.

Thank you for your response.

I suppose that DDR_Stress_Tester_V1.0.3_UART1_for_SDboot&JTAG binary image is made by DDR_Stress_Tester_V1 .0.3 source code.

Would you teach the change point when DDR_Stress_Tester_V1.0.3_UART1_for_SDboot&JTAG was made?

Best Regards,
Yuuki

[igorpadykov]

Hi Yuuki

there are no changes, just follow "MX6_DRAM_Stress_Test_Guide_vx.pdf"

whch is included in DDR_Stress_Tester package p.12:

..This creates the DRAM Stress Test images (.bin and .elf files) under the directory

.\dram_stress_test\output\mx6x\bin (Note that a new directory .\dram_stress_test\output has been created)

6. The .elf file can be used with a JTAG debugger

also please follow this document sect.5 How to run the DRAM Stress Test from the debugger

Best regards

igor

[yuuki]

Dear Igor-san,

Thank you for your support.

I do not have MX6_DRAM_Stress_Test_Guide_vx.pdf document.
Can you send this to me?

Best Regards,

Yuuki

[igorpadykov · Accepted solution]

Hi Yuuki

please enter service request, I will send it to you.

Best regards

igor

[yuuki]

Dear Igor-san,

Thank you for yoru support.

I made the following SR.

1-3694444541

Would you respond about this?

Best Regards,

Yuuki