About behavior of SDIO controller for Errata No.13 of 1.MX21

[yuuki]

I refer to errata No.13 of i.MX21.

MC9328MX21CE.pdf (rev6)

- No.13 (P.6)

The following contents are explained here.
"After sending the first block of data, the SDIO controller operation will stop if there is no BUSY signal responding from card be supported."

「the SDIO controller operation will stop」
Concretely, is it in what kind of situation?

Does SDCLK only stop?

Best Regards,

[YixingKong]

Yuuki

Had your issue got resolved? If yes, we are going to close the discussion in 3 days. If you still need help please feel free to contact Freescale.

Thanks,
Yixing

[yuuki]

Dear Bio_TICFSL-san, Yixing-san,

Thank you for your support.

The problem was solved.
I close this discussion.

Thank you.

[Bio_TICFSL · Accepted solution]

Actually, the effect of this erratum can cause a write transfer error. However, most probably, in this case a transfer should just stall, and the MMC/SD host controller module would not report any valid transfer status. The reason is that the STATUS[CRC_WRITE_ERR] and STATUS[WR_CRC_ERROR_CODE] bits are valid only when a transfer is complete, i.e. when the STATUS[WRITE_OP_DONE] bit is set.

Hope this helps

Regards