About a timing between Data Valid and DTACK Active in DTACK mode Read Access for i.MX6

[yuuki]

Dear all,

We want to use DTACK mode of EIM.

We referred to the following part of the data sheet.

IMX6DLIEC.pdf (Rev.5)

- Figure 21. DTACK Mode Read Access (DAP=0)

- Table 38. EIM Asynchronous Timing Parameters Table Relative Chip to Select

We have the following question about a timing for DTACK mode Read Access.

I understand that the DTACK signal should become active after the Data valid.

Is my understanding right?

According to Figure 21,

the DTACK signal becomes active after the Data valid.

However, according to Table 38,

"Input Data Valid to EIM_CSx_B Invalid"(WE43) is Min "MAXCO - MAXCSO + MAXDI"ns.

   => MAXCO(10ns) - MAXCSO(10) + MAXDI(5ns) = 5ns

"EIM_DTACK_B Active to EIM_CSx_B Invalid"(WE47) is Min "MAXCO - MAXCSO + MAXDTI"ns.

   => MAXCO(10ns) - MAXCSO(10) + MAXDTI(10ns) = 10ns

For the timing, the Data becomes valid after DTACK active.

How should I understand the explanation of the data sheet?

May I have advice?

Best Regards,

Yuuki

[Yuri]

Hello,

The mentioned minimal values for parameters WE43 and WE47 

are just hardware values, that does not take into account that some
EIM timings are software configurable. Say, CS0 assertion time is
defined by the RWSC bit field of EIM_CSnRCR1 register, and if RWSC

is not equal zero (quite reasonable case), minimal WE43 is not actual.

Have a great day,
Yuri

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[yuuki]

Dear Yuri-san,

Thank you for your support.

I understand that the DTACK signal should become active after the Data valid.

Is my understanding right?

May I have advice?

Best Regards,

Yuuki

[Yuri · Accepted solution]

Hello,

Yes, generally DTACK is intended to indicate data valid state.

Regards,

Yuri.