Hi Felix
description is correct also please refer to RM in
sect.16.6.5 Port Timing Control Register 3 (AUDMUX_PTCR3) :
TFSEL=3, TCSEL=3
Best regards
igor
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Hi Felix
description is correct also please refer to RM in
sect.16.6.5 Port Timing Control Register 3 (AUDMUX_PTCR3) :
TFSEL=3, TCSEL=3
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------