i.MX6SL DDR3 support for L3.0.35_2.1.0

[#1]

This patch adds DDR3 support for i.MX6SL, it is functionally tested with L3.0.35_2.1.0 release.

[YixingKong]

If you want to publish the document. Please put it in Document Review Staging Area for 7 days and ask some one to review

[GraceH]

It is old post. I just edit the post.

[Danube]

Hi

Does this patch code run in SL+DDR3 system ?

Is is 2 chip select design ?

Does any schematic update ?